X40010 Xicor, X40010 Datasheet - Page 13

• Manufacturer Part Number: X40010
• Description: Dual Voltage Monitor with Integrated CPU Supervisor
• Manufacturer: Xicor

– One bit of the slave command byte is a R/W bit. The
Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter
is undefined on a power up condition.
Operational Notes
The device powers-up in the following state:
– The device is in the low power standby state.
– The WEL bit is set to ‘0’. In this state it is not possible
– SDA pin is the input mode.
– RESET/RESET Signal is active for
Figure 14. Sequential Read Sequence
X40010/X40011/X40014/X40015 – Preliminary
REV 1.3.4 7/12/02
R/W bit of the Slave Address Byte defines the opera-
tion to be performed. When the R/W bit is a one, then
a read operation is selected. A zero selects a write
operation.
to write to the device.
Signals from
Signals from
the Master
the Slave
SDA Bus
Address
Slave
1
C
A
K
t
PURST
Data
(1)
.
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A
C
K
Data
(2)
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
– A three step sequence is required before writing into
prior to the stop bit in order to start a nonvolatile write
cycle.
the Control Register to change Watchdog Timer or
Block Lock settings.
A
C
K
(n is any integer greater than 1)
Characteristics subject to change without notice.
Data
(n-1)
C
A
K
Data
(n)
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