MC9S12E Motorola, MC9S12E Datasheet - Page 124

• Manufacturer Part Number: MC9S12E
• Description: MC9S12E-Family Device User Guide V01.04
• Manufacturer: Motorola

Device User Guide — 9S12E128DGV1/D V01.04
B.4.3 Phase Locked Loop
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
B.4.3.1 XFC Component Selection
This section describes the selection of the XFC components to achieve a good filter characteristics.
The following procedure can be used to calculate the resistance and capacitance values using typical
values for K
The grey boxes show the calculation for f
for f
The VCO Gain at the desired VCO frequency is approximated by:
The phase detector relationship is given by:
i
ch
124
is the current in tracking mode.
OSC
= 4MHz and a 25MHz bus clock.
1
, f
1
and i
f
osc
K
V
ch
from Table B-4.
=
K
refdv+1
K
Φ
Figure B-2 Basic PLL functional diagram
Freescale Semiconductor, Inc.
1
=
1
For More Information On This Product,
⋅
e
–
(
---------------------- -
f
K
i
1
ch
1
f
–
ref
VDDPLL
⋅
Go to: www.freescale.com
f
1V
VCO
vco
⋅
K
=
)
V
= 50MHz and f
–
100
∆
f
cmp
C
C
⋅
p
Loop Divider
e
s
Detector
= 316.7Hz/Ω
(
----------------------- -
Phase
60 50
synr+1
–
K
100
Φ
ref
–
1
R
= 1MHz. E.g., these frequencies are used
= -90.48MHz/V
)
XFC Pin
1
2
VCO
K
V
f
vco