MC9S12E Motorola, MC9S12E Datasheet - Page 121

• Manufacturer Part Number: MC9S12E
• Description: MC9S12E-Family Device User Guide V01.04
• Manufacturer: Motorola

B.4 Reset, Oscillator and PLL
This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and
Phase-Locked-Loop (PLL).
B.4.1 Startup
Table B-2 summarizes several startup characteristics explained in this section. Detailed description of the
startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide.
B.4.1.1 POR
The release level V
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
B.4.1.2 LVR
The release level V
if the device is powered externally. After releasing the LVR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
B.4.1.3 SRAM Data Retention
Provided an appropriate external reset signal is applied to the MCU, preventing the CPU from executing
code when VDD5 is out of specification limits, the SRAM contents integrity is guaranteed if after the reset
the PORF bit in the CRG Flags Register has not been set.
Conditions are shown in Table A-4 unless otherwise noted
Num
1
2
3
4
5
6
7
8
C
T
T
D
D
D
D
P
P
POR release level
POR assert level
Reset input pulse width, minimum input time
Startup from Reset
Interrupt pulse width, IRQ edge-sensitive mode
Wait recovery startup time
LVR release level
LVR assert level
PORR
LVRR
and the assert level V
and the assert level V
CQOUT
CQOUT
Freescale Semiconductor, Inc.
For More Information On This Product,
Table B-2 Startup Characteristics
Rating
no valid oscillation is detected, the MCU will start using the internal self
no valid oscillation is detected, the MCU will start using the internal self
Go to: www.freescale.com
PORA
LVRA
are derived from the V
are derived from the V
uposc
uposc
.
.
Symbol
PW
Device User Guide — 9S12E128DGV1/D V01.04
V
PW
V
V
V
n
t
PORR
PORA
WRS
LVRR
LVRA
RST
RSTL
IRQ
Min
0.97
2.25
192
20
2
DD
DD
Supply. They are also valid
Supply. They are also valid
Typ
Max
2.07
2.55
196
14
Unit
n
t
t
ns
osc
cyc
V
V
osc
V
V
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