MCF5232 ETC, MCF5232 Datasheet - Page 36

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MCF5232

Manufacturer Part Number
MCF5232
Description
Integrated Microprocessor Hardware Specification
Manufacturer
ETC
Datasheet

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Preliminary Electrical Characteristics
36
NOTES:
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
θ
recommends the use of θ
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the Ψ
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
Per JEDEC JESD51-6 with the board horizontal.
θ
recommends the use of θ
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the Ψ
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
Per JEDEC JESD51-6 with the board horizontal.
θ
recommends the use of θ
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the Ψ
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
Per JEDEC JESD51-6 with the board horizontal.
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written in conformance with Psi-JT.
JMA
JMA
JMA
The average chip-junction temperature (T
Where:
and Ψ
and Ψ
and Ψ
T
Θ
P
P
A
D
INT
JMA
jt
jt
jt
= Ambient Temperature, °C
= P
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
= I
= Package Thermal Resistance, Junction-to-Ambient, °C/W
INT
DD
+ P
MCF523x Integrated Microprocessor Hardware Specification, Rev. 1.3
× V
I/O
JmA
JmA
JmA
DD
and power dissipation specifications in the system design to prevent device junction
and power dissipation specifications in the system design to prevent device junction
and power dissipation specifications in the system design to prevent device junction
, Watts - Chip Internal Power
T
J
=
T
A
+
J
Preliminary
(
) in °C can be obtained from:
P
D
×
Θ
JMA
)
(1)
Freescale Semiconductor
jt
jt
jt

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