P80C557E4 Philips Semiconductors, P80C557E4 Datasheet - Page 54

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P80C557E4

Manufacturer Part Number
P80C557E4
Description
Single-chip 8-bit microcontroller
Manufacturer
Philips Semiconductors
Datasheet

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1. Reserved for future use; a write operation must write “0” to the location.
Philips Semiconductors
NOTE:
Table 45. Description of FMCON bits
The four FCB bits are write protected if the security feature is
activated. Then only instructions in the internal program memory
(FEEPROM) are able to write FCB (3–0), boot ROM and external
program memory instructions cannot change FCB (3–0) except the
full erase code can be loaded.
The duration of a write or erase operation is determined by the
FEEPROM timer. This timer includes a zero point RC oscillator and
cannot be controlled by software.
X
V
1) = 5 LSB’s of DPTR are don’t care
2) = 5 LSB’s of DPTR are “0”
3) = 8 LSB’s of DPTR are don’t care
4) = 8 LSB’s of DPTR contain 08H.
1999 Mar 02
UBS1
0
0
1
1
HV
FCB3
0
0
1
0
1
BYTE_READ
BYTE_WRITE
PAGE_ERASE
BLOCK_ERASE
FULL_ERASE
Single-chip 8-bit microcontroller
= don’t care or not defined
= verified byte (read back)
BOOT-ROM
ROUTINE
FMCON (FB)
FCB2
0
1
1
0
0
UBS0
0
1
0
1
FCB1
0
0
0
1
1
FFBAH
FFADH
FFAAH
FFA5H
FFA0H
ADDRESS
CALL
FCB0
0
1
0
1
0
UBS1
7
45H
45H
4CH
43H
4AH
FMCON
User - Boot selection bits
User memory mapped from 0 to 64 K.
User memory mapped from 0 to 63 K.
Boot ROM mapped from 63 K to 64 K.
User memory mapped from 0 to 63 K, but UBS1 bit cleared by hardware in this user address range.
Boot ROM mapped from 63 K to 64 K. User software should not write “1” UBS1.
Boot ROM mapped from 0 to 64 K. User software should not write “1” UBS1.
High voltage indication bit. Read only. Is “1” as long as the high voltage for an erase or write operation
is present.
Function Code Bits
Value after Reset.
Byte Write or byte read (verify)
Page Erase (32 bytes boundaries).
Block Erase (256 bytes boundaries).
Full Erase (32 Kbytes).
(IN)
UBS0
6
15H
15H
1CH
13H
1AH
Figure 49. FEEPROM control register.
FMCON
(OUT)
HV
5
XXH
BYTE
XXH
XXH
XXH
54
ACC
(IN)
4
P83C557E4/P80C557E4/P89C557E4
For calling a user routine in the boot ROM first all interrupts must be
disabled and the DPTR and A have to be loaded with the desired
values. After setting UBS0 = 1 and UBS1 = 0 and selecting the
function via FCB-bits the respective user routine has to be called.
The table below lists the boot ROM user routines, which can be
called by the user program. The content of FMCON, A and DPTR
before the call is described by “(IN)” and the contents after the
return is described by “(OUT)”. The boot ROM user routines do not
change other registers or Data memory.
1)
BYTE
BYTE
08H
02H
0AH
(OUT)
ACC
FCB3
3
(V)
BYTE ADDRESS
BYTE ADDRESS
PAGE ADDRESS
BLOCK ADDRESS
XXXXH
FCB2
2
DPTR
(IN)
FCB1
1)
1
3)
BYTE ADDRESS
BYTE ADDRESS
PAGE ADDRESS
BLOCK ADDRESS
0018H
Product specification
FCB0
(OUT)
DPTR
0
2)
4)

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