P80C557E4 Philips Semiconductors, P80C557E4 Datasheet - Page 22

• Manufacturer Part Number: P80C557E4
• Description: Single-chip 8-bit microcontroller
• Manufacturer: Philips Semiconductors

Philips Semiconductors
When Timer 0 is in Mode 3, Timer 1 can be programmed to operate
in Modes 0, 1 or 2 but cannot set an interrupt request flag or
generate an interrupt. However the overflow from Timer 1 can be
used to pulse the serial port baud-rate generator.
With a 16 MHz crystal, the counting frequency of these
timer/counters is as follows:
Table 12. Description of TMOD bits
Table 13. Timer 0 / Timer 1 operation select
1999 Mar 02
In the timer function, the timer is incremented at a frequency of
1.33 MHz – a division by 12 of the system clock frequency
0 Hz to an upper limit of 0.66 MHz (1/24 of the system clock
frequency) when programmed for external inputs
Single-chip 8-bit microcontroller
SYMBOL
Gate
C/T
M1
M0
M1
0
0
1
1
1
TMOD (89H)
TMOD.7
TMOD.3
TMOD.6
TMOD.2
TMOD.5
TMOD.1
TMOD.4
TMOD.0
BIT
M0
0
1
0
1
1
GATE
Gating control when set. Timer/Counter “x” is enabled only while “INTx” pin is high and “TRx” control pin is set.
When cleared Timer “x” is enabled whenever “TRx” control bit is set.
Timer or Counter Selector cleared for Timer operation (input from internal system clock). Set for Counter
operation (input from “Tx” input pin).
Timer 0, Timer 1 mode select see Table 13.
8048 Timer “TLx” serves as 5-bit prescaler.
16-bit Timer/Counter “THx” and “TLx” are cascaded; there is no prescaler.
8-bit auto-reload Timer/Counter “THx” holds a value which is to be reloaded into “TLx” each time it overflows.
(Timer 0) TL0 is an 8-bit Timer/Counter controlled by the standard Timer 0 control bits. TH0 is an 8-bit timer
only controlled by Timer 1 control bits.
(Timer 1) Timer/Counter 1 stopped.
7
Figure 19. Timer/Counter mode control (TMOD) register.
C/T
6
Timer 1
M1
5
22
M0
P83C557E4/P80C557E4/P89C557E4
4
Both internal and external inputs can be gated to the counter by a
second external source for directly measuring pulse durations.
When configured as a counter, the register is incremented on every
falling edge on the corresponding input pin, T0 or T1. The
incremented register value can be read earliest during the second
machine cycle after that one, during which the incrementing pulse
occurred.
The counters are started and stopped under software control. Each
one sets its interrupt request flag when it overflows from all HIGHs
to all LOWs (or automatic reload value), with the exception of mode
3 as previously described.
OPERATING
FUNCTION
GATE
3
C/T
2
Timer 0
M1
1
Product specification
0
M0