P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 51

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P89V51RD2

Manufacturer Part Number
P89V51RD2
Description
8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
9397 750 12964
Product data
7.10 Reset
7.9 Security Bit
The first two options are more reliable because the Watchdog timer is never disabled
as in option #3. If the program counter ever goes astray, a match will eventually occur
and cause an internal reset. The second option is also not recommended if other
PCA modules are being used. Remember, the PCA timer is the time base for all
modules; changing the time base for other modules would not be a good idea. Thus,
in most applications the first solution is the best option.
;CALL the following WATCHDOG subroutine periodically.
This routine should not be part of an interrupt service routine, because if the program
counter goes astray and gets stuck in an infinite loop, interrupts will still be serviced
and the Watchdog will keep getting reset. Thus, the purpose of the Watchdog would
be defeated. Instead, call this subroutine from the main program within 2
the PCA timer.
The Security Bit protects against software piracy and prevents the contents of the
flash from being read by unauthorized parties in Parallel Programmer Mode. It also
protects against code corruption resulting from accidental erasing and programming
to the internal flash memory.
When the Security Bit is activated all parallel programming commands except for
Chip-Erase are ignored (thus the device cannot be read). However, ISP reads of the
user’s code can still be performed if the serial number and length has not been
programmed. Therefore, when a user requests to program the Security Bit, the
programmer should prompt the user and program a serial number into the
device.
A system reset initializes the MCU and begins program execution at program memory
location 0000H. The reset input for the device is the RST pin. In order to reset the
device, a logic level high must be applied to the RST pin for at least two machine
cycles (24 clocks), after the oscillator becomes stable. ALE, PSEN are weakly pulled
high during reset. During reset, ALE and PSEN output a high level in order to perform
a proper reset. This level must not be affected by external element. A system reset
will not affect the 1 kbyte of on-chip RAM while the device is running, however, the
contents of the on-chip RAM during power up are indeterminate.
1. Periodically change the compare value so it will never match the PCA timer.
2. Periodically change the PCA timer value so it will never match the compare
3. Disable the Watchdog by clearing the WDTE bit before a match occurs and then
CLR
MOV
MOV
SETB
RET
values.
re-enable it.
EA
CCAP4L,#00
CCAP4H,CH
EA
Rev. 01 — 01 March 2004
;Hold off interrupts
;Next compare value is within 255 counts of
;Re-enable interrupts
current PCA timer value
8-bit microcontrollers with 80C51 core
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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