P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 41

• Manufacturer Part Number: P89V51RD2
• Description: 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 12964
Product data
Table 29:
Table 30:
Table 31:
Bit addressable; Reset source(s): any reset; Reset value: 00000000B
Table 32:
Bit
7
6
5
4
3
2
1
0
SPR1
0
0
1
1
Bit
7
6
5 to 0
Bit
Symbol
SPCR - SPI control register (address D5H) bit description
SPCR - SPI control register (address D5H) clock rate selection
SPSR - SPI status register (address AAH) bit allocation
SPSR - SPI status register (address AAH) bit description
Symbol
SPIE
SPE
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
Symbol
SPIF
WCOL
-
SPIF
7
Rev. 01 — 01 March 2004
WCOL
SPR0
0
1
0
1
6
Description
If both SPIE and ES are set to one, SPI interrupts are enabled.
SPI enable bit. When set enables SPI.
Data transmission order. 0 = MSB first; 1 = LSB first in data
transmission.
Master/slave select. 1 = master mode, 0 = slave mode.
Clock polarity. 1 = SCK is high when idle (active LOW), 0 = SCK is
low when idle (active HIGH).
Clock Phase control bit. 1 = shift triggered on the trailing edge of
the clock; 0 = shift triggered on the leading edge of the clock.
SPI Clock Rate Select bit 1. Along with SPR0 controls the SCK
rate of the device when a master. SPR1 and SPR0 have no effect
on the slave. See
SPI Clock Rate Select bit 0. Along with SPR1 controls the SCK
rate of the device when a master. SPR1 and SPR0 have no effect
on the slave. See
Description
SPI interrupt flag. Upon completion of data transfer, this bit is set to
‘1’. If SPIE = 1 and ES = 1, an interrupt is then generated. This bit
is cleared by software.
Write Collision Flag. Set if the SPI data register is written to during
data transfer.
This bit is cleared by software.
Reserved for future use. Should be set to
5
-
Table 30
Table 30
4
-
SCK = f
4
16
64
128
8-bit microcontrollers with 80C51 core
below.
below.
osc
3
-
divided by
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P89V51RD2
2
-
‘0’
by user programs.
1
-
41 of 75
0
-