P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 36

• Manufacturer Part Number: P89V51RD2
• Description: 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 12964
Product data
7.5.5 Framing error
7.5.6 More about UART mode 1
Table 24:
Table 25:
Framing error (FE) is reported in the SCON.7 bit if SMOD0 (PCON.6) =
SMOD0 = 0, SCON.7 is the SM0 bit for the UART, it is recommended that SM0 is set
up before SMOD0 is set to ‘1’.
Reception is initiated by a detected 1-to-0 transition at RxD. For this purpose RxD is
sampled at a rate of 16 times whatever baud rate has been established. When a
transition is detected, the divide-by-16 counter is immediately reset to align its
rollovers with the boundaries of the incoming bit times.
Bit
7
6
5
4
3
2
1
0
SM0, SM1
0 0
0 1
1 0
1 1
SCON - Serial port control register (address 98H) bit description
SCON - Serial port control register (address 98H) SM0/SM1 mode definition
Symbol
SM0/FE
SM1
SM2
REN
TB8
RB8
TI
RI
Rev. 01 — 01 March 2004
UART mode
0: shift register
1: 8-bit UART
2: 9-bit UART
3: 9-bit UART
Description
The usage of this bit is determined by SMOD0 in the PCON
register. If SMOD0 = 0, this bit is SM0, which with SM1, defines
the serial port mode. If SMOD0 = 1, this bit is FE (Framing Error).
FE is set by the receiver when an invalid stop bit is detected. Once
set, this bit cannot be cleared by valid frames but can only be
cleared by software. (Note: It is recommended to set up UART
mode bits SM0 and SM1 before setting SMOD0 to ‘1’.)
With SM0, defines the serial port mode (see
Enables the multiprocessor communication feature in Modes 2 and
3. In Mode 2 or 3, if SM2 is set to ‘1’, then Rl will not be activated if
the received 9th data bit (RB8) is ‘0’. In Mode 1, if SM2 = 1 then RI
will not be activated if a valid stop bit was not received. In Mode 0,
SM2 should be ‘0’.
Enables serial reception. Set by software to enable reception.
Clear by software to disable reception.
The 9th data bit that will be transmitted in Modes 2 and 3. Set or
clear by software as desired.
In Modes 2 and 3, is the 9th data bit that was received. In Mode 1,
it SM2 = 0, RB8 is the stop bit that was received. In Mode 0, RB8
is undefined.
Transmit interrupt flag. Set by hardware at the end of the 8th bit
time in Mode 0, or at the stop bit in the other modes, in any serial
transmission. Must be cleared by software.
Receive interrupt flag. Set by hardware at the end of the 8th bit
time in Mode 0, or approximately halfway through the stop bit time
in all other modes. (See SM2 for exceptions). Must be cleared by
software.
8-bit microcontrollers with 80C51 core
Baud rate
CPU clock/6
variable
CPU clock/32 or CPU clock/16
variable
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P89V51RD2
Table 25
1
below).
. If
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