P89LPC932 Philips Semiconductors, P89LPC932 Datasheet - Page 29

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P89LPC932

Manufacturer Part Number
P89LPC932
Description
80C51 8-bit microcontroller with two-clock core 8 KB 3 V low-power Flash with 512-byte data EEPROM
Manufacturer
Philips Semiconductors
Datasheet

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Product data
8.18.7 Alternating output mode
8.18.8 PLL operation
In asymmetrical mode, the user can set up PWM channels A/B and C/D as
alternating pairs for bridge drive control. In this mode the output of these PWM
channels are alternately gated on every counter cycle.
The PWM module features a Phase Locked Loop that can be used to generate a
CCUCLK frequency between 16 MHz and 32 MHz. At this frequency the PWM
module provides ultrasonic PWM frequency with 10-bit resolution provided that the
crystal frequency is 1 MHz or higher. The PLL is fed an input signal of 0.5 - 1 MHz
and generates an output signal of 32 times the input frequency. This signal is used to
clock the timer. The user will have to set a divider that scales PCLK by a factor of
1-16. This divider is found in the SFR register TCR21. The PLL frequency can be
expressed as shown in
Where: N is the value of PLLDV3:0.
Since N ranges in 0 - 15, the CCLK frequency can be in the range of PCLK to
PLL frequency
Fig 9. Symmetrical PWM.
Fig 10. Alternate output mode.
=
----------------- -
Rev. 04 — 06 January 2004
PLCK
N
+
8-bit microcontroller with accelerated two-clock 80C51 core
1
Equation
1.
002aaa536
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
002aaa535
TOR2
COMPARE VALUE A (or C)
COMPARE VALUE B (or D)
0
PWM OUTPUT A (or C) (P2.6)
PWM OUTPUT B (or D) (P1.6)
TIMER VALUE
P89LPC932
TOR2
COMPARE VALUE
TIMER VALUE
0
NON-INVERTED
INVERTED
PCLK
29 of 60
(1)
16
.

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