P89LPC932 Philips Semiconductors, P89LPC932 Datasheet
P89LPC932
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P89LPC932 Summary of contents
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... The P89LPC932 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC932 in order to reduce component count, board space, and system cost. 2. Features ...
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... I/O pins minimum (28-pin package I/O pins while using on-chip oscillator and reset options. Only power and ground connections are required to operate the P89LPC932 when on-chip oscillator and reset options are selected. Serial Flash programming allows simple in-circuit production coding. Flash security bits prevent reading of sensitive application programs ...
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... Ordering information Table 1: Type number P89LPC932BA P89LPC932BDH P89LPC932FDH P89LPC932FHN 3.1 Ordering options Table 2: Type number P89LPC932BA P89LPC932BDH P89LPC932FDH P89LPC932FHN 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core Ordering information Package Name Description PLCC28 plastic leaded chip carrier; 28 leads TSSOP28 plastic thin shrink small outline package ...
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... PORT 1 CONFIGURABLE I/Os PORT 0 CONFIGURABLE I/Os KEYPAD INTERRUPT PROGRAMMABLE CPU OSCILLATOR DIVIDER CLOCK ON-CHIP CONFIGURABLE RC OSCILLATOR OSCILLATOR Rev. 04 — 06 January 2004 P89LPC932 UART SPI REAL-TIME CLOCK/ SYSTEM TIMER TIMER 0 TIMER 1 WATCHDOG TIMER AND OSCILLATOR CCU (CAPTURE/ COMPARE UNIT) ANALOG COMPARATORS POWER MONITOR ...
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... OCD/P2.1 2 KBI0/CMP2/P0.0 3 OCC/P1.7 4 OCB/P1.6 5 RST/P1 XTAL1/P3.1 8 CLKOUT/XTAL2/P3.0 9 INT1/P1.4 10 SDA/INT0/P1.3 11 SCL/T0/P1.2 12 MOSI/P2.2 13 MISO/P2.3 14 002aaa512 Rev. 04 — 06 January 2004 P89LPC932 28 P2.7/ICA 27 P2.6/OCA 26 P0.1/CIN2B/KBI1 25 P0.2/CIN2A/KBI2 24 P0.3/CIN1B/KBI3 23 P0.4/CIN1A/KBI4 22 P0.5/CMPREF/KBI5 P0.6/CMP1/KBI6 19 P0.7/T1/KBI7 18 P1.0/TXD 17 P1.1/RXD 16 P2.5/SPICLK 15 P2.4/SS © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... RST/P1 P89LPC932BA XTAL1/P3.1 8 CLKOUT/XTAL2/P3 INT1/P1.4 SDA/INT0/P1.3 11 SDA/INT0/P1 INT1/P1.4 5 CLKOUT/XTAL2/P3.0 4 P89LPC932FHN XTAL1/P3 RST/P1.5 OCB/P1.6 1 Rev. 04 — 06 January 2004 P89LPC932 25 P0.2/CIN2A/KBI2 24 P0.3/CIN1B/KBI3 23 P0.4/CIN1A/KBI4 22 P0.5/CMPREF/KBI5 P0.6/CMP1/KBI6 19 P0.7/T1/KBI7 002aaa513 15 P0.7/T1/KBI7 16 P0.6/CMP1/KBI6 P0.5/CMPREF/KBI5 19 P0.4/CIN1A/KBI4 20 P0.3/CIN1B/KBI3 P0.2/CIN2A/KBI2 ...
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... CMP1 — Comparator 1 output. I KBI6 — Keyboard input 6. I/O P0.7 — Port 0 bit 7. I/O T1 — Timer/counter 1 external count input or overflow output. I KBI7 — Keyboard input 7. Rev. 04 — 06 January 2004 P89LPC932 for details. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. and Table 8 “ ...
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... In-System Programming mode. I/O P1.6 — Port 1 bit 6. O OCB — Output Compare B. I/O P1.7 — Port 1 bit 7. O OCC — Output Compare C. Rev. 04 — 06 January 2004 P89LPC932 for details. P1.2 - P1.3 are open drain when used as © Koninklijke Philips Electronics N.V. 2004. All rights reserved. and Table 8 “ ...
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... I/O P2.6 — Port 2 bit 6. O OCA — Output Compare A. I/O P2.7 — Port 2 bit 7. I ICA — Input Capture A. Rev. 04 — 06 January 2004 P89LPC932 for details. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. and Table 8 “ ...
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... XTAL1/XTAL2 are not used to generate the clock for the Real-Time clock/system timer. I Ground reference. I Power Supply: This is the power supply voltage for normal operation as well as Idle and Power-Down modes. Rev. 04 — 06 January 2004 P89LPC932 for details. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. and Table 8 “ ...
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... reserved bit and may be used in future derivatives. – ‘0’ must be written with ‘0’, and will return a ‘0’ when read. – ‘1’ must be written with ‘1’, and will return a ‘1’ when read. Rev. 04 — 06 January 2004 P89LPC932 TxD RxD T0 SCL ...
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Table 4: Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H AUXR1 Auxiliary function register A2H Bit address B* B register F0H [2] BRGR0 Baud rate generator rate BEH LOW ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR addr. 2 I2ADR I C slave address register DBH Bit address 2 I2CON control register D8H 2 I2DAT I C data register ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR addr. OCRAH Output compare A register EFH HIGH OCRAL Output compare A register EEH LOW OCRBH Output compare B register FBH HIGH OCRBL Output ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR addr. P2M1 Port 2 output mode 1 A4H P2M2 Port 2 output mode 2 A5H P3M1 Port 3 output mode 1 B1H P3M2 Port ...
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... BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ‘0’. If any are written while BRGEN = 1, the result is unpredictable. [3] The RSTSRC register reflects the cause of the P89LPC932 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx110000. ...
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... Remark: Please refer to the P89LPC932 User’s Manual for a more detailed functional description. 8.1 Enhanced CPU The P89LPC932 uses an enhanced 80C51 CPU which runs at 6 times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. ...
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... Idle mode, it may be turned off prior to entering Idle, saving additional power. 8.3 On-chip RC oscillator option The P89LPC932 has a 6-bit TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz, 2.5 %. ...
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... Philips Semiconductors 8.6 CPU Clock (CCLK) wake-up delay The P89LPC932 has an internal wake-up timer that delays the clock until it stabilizes depending on the clock source used. If the clock source is any of the three crystal selections (low, medium and high frequencies) the delay is 992 OSCCLK cycles plus 60 to 100 s ...
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... Philips Semiconductors The P89LPC932 also has 512 bytes of on-chip Data EEPROM that is accessed via SFRs (see 8.10 Data RAM arrangement The 768 bytes of on-chip RAM are organized as shown in Table 5: Type DATA IDATA XDATA 8.11 Interrupts The P89LPC932 uses a four priority level interrupt structure. This allows great fl ...
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... Philips Semiconductors If an external interrupt is enabled when the P89LPC932 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to RTCF ERTC (RTCCON.1) WDOVF any CCU interrupt (see Note (1)) (1) See Section 8.18 “Capture/Compare Unit (CCU)” ...
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... Philips Semiconductors 8.12 I/O ports The P89LPC932 has four I/O ports: Port 0, Port 1, Port 2, and Port 3. Ports 0, 1and 2 are 8-bit ports, and Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in Table 6: Number of I/O pins available ...
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... After power-up, all pins are in Input-Only mode. Please note that this is different from the LPC76x series of devices. • • Every output on the P89LPC932 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to specifications. ...
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... above the P89LPC932 device is to operate with a power supply that can be below 2.7 V, BOE should be left in the unprogrammed state so that the device can operate at 2.4 V, otherwise continuous brownout reset may prevent the device from operating. ...
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... Reset vector Following reset, the P89LPC932 will fetch instructions from either address 0000h or the Boot address. The Boot address is formed by using the Boot Vector as the high byte of the address and the low byte of the address = 00h. The Boot address will be used if a UART break reset occurs, or the non-volatile Boot Status bit (BOOTSTAT. the device is forced into ISP mode during power-on (see P89LPC932 User’ ...
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... Philips Semiconductors 8.16 Timers/counters 0 and 1 The P89LPC932 has two general purpose counter/timers which are upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be configured to operate either as timers or event counter. An option to automatically toggle the T0 and/or T1 pins upon timer overflow has been added. ...
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... Philips Semiconductors 8.17 Real-Time clock/system timer The P89LPC932 has a simple Real-Time clock that allows a user to continue running an accurate timer while the rest of the device is powered-down. The Real-Time clock can be a wake- interrupt source. The Real-Time clock is a 23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down counter. When it reaches all ‘ ...
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... Fig 8. Asymmetrical PWM, downcounting. 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 04 — 06 January 2004 P89LPC932 TOR2 COMPARE VALUE TIMER VALUE 0x0000 NON-INVERTED ...
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... Since N ranges 15, the CCLK frequency can be in the range of PCLK to 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core Equation 1. PLCK = ----------------- - Rev. 04 — 06 January 2004 P89LPC932 TOR2 COMPARE VALUE TIMER VALUE 0 NON-INVERTED INVERTED 002aaa535 TOR2 COMPARE VALUE A (or C) COMPARE VALUE B (or D) TIMER VALUE 0 PWM OUTPUT A (or C) (P2 ...
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... TOCF2D (TIFR2.6) Fig 11. Capture/Compare Unit interrupts. 8.19 UART The P89LPC932 has an enhanced UART that is compatible with the conventional 80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The P89LPC932 does include an independent Baud Rate Generator. The baud rate can be selected from the oscillator (divided by a constant), Timer 1 overfl ...
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... Baud rate generator and selection The P89LPC932 enhanced UART has an independent Baud Rate Generator. The baud rate is determined by a baud-rate preprogrammed into the BRGR1 and BRGR0 SFRs which together form a 16-bit baud rate divisor value that works in a similar manner as Timer 1 ...
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... If double buffering is enabled, TB8 must be updated before SBUF is written, as TB8 will be double-buffered together with SBUF data. 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core th bit (bit 8) in double buffering (Modes 1, 2 and 3) Rev. 04 — 06 January 2004 P89LPC932 © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
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... C-bus configuration is shown in 2 C-bus interface that supports data transfers up to 400 kHz C-BUS P1.3/SDA P1.2/SCL P89LPC932 2 C-bus configuration. Rev. 04 — 06 January 2004 P89LPC932 Figure 13. The P89LPC932 device OTHER DEVICE OTHER DEVICE 2 2 WITH I C-BUS WITH I C-BUS INTERFACE INTERFACE 002aaa559 © ...
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... INPUT FILTER P1.2/SCL OUTPUT STAGE TIMER 1 OVERFLOW I2CON P1.2 I2SCLH I2SCLL STATUS BUS I2STAT 2 C-bus serial interface block diagram. Rev. 04 — 06 January 2004 P89LPC932 8 I2ADR ADDRESS REGISTER COMPARATOR SHIFT REGISTER ACK I2DAT 8 BIT COUNTER / ARBITRATION & CCLK TIMING SYNC LOGIC & CONTROL ...
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... Philips Semiconductors 8.21 Serial Peripheral Interface (SPI) The P89LPC932 provides another high-speed serial communication interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master mode and Slave mode Mbit/s can be supported in either Master or Slave mode. It has a Transfer Completion Flag and Write Collision Flag Protection ...
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... SHIFT MOSI REGISTER SPICLK SPI CLOCK PORT GENERATOR Master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS GENERATOR Rev. 04 — 06 January 2004 P89LPC932 Slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS 002aaa435 Slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS ...
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... Product data 8-bit microcontroller with accelerated two-clock 80C51 core Master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK port GENERATOR port Rev. 04 — 06 January 2004 P89LPC932 Slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS Slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK ...
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... Philips Semiconductors 8.22 Analog comparators Two analog comparators are provided on the P89LPC932. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logical one (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage). Otherwise the output is a zero. Each comparator may be confi ...
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... In order to set the flag and cause an interrupt, the pattern on Port 0 must be held longer than 6 CCLKs. 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core Rev. 04 — 06 January 2004 P89LPC932 © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
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... Watchdog timer in watchdog mode. Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the watchdog clock and the CPU is powered-down, the watchdog is disabled. The Watchdog timer has a time-out period that ranges from a few few seconds. Please refer to the P89LPC932 User’s Manual for more details. MOV WFEED1, #0A5H ...
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... Philips Semiconductors 8.26 Data EEPROM The P89LPC932 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides 100,000 minimum erase/program cycles for each byte. • ...
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... Power-on reset code execution: elements: the Boot Vector and the Boot Status Bit. Following reset, the P89LPC932 examines the contents of the Boot Status Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which is the normal start address of the user’ ...
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... P89LPC932 through the serial port. This firmware is provided by Philips and embedded within each P89LPC932 device. The Philips In-System Programming facility has made in-system programming in an embedded application possible with a minimum of additional expense in components and circuit board area. The ISP function uses fi ...
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... Conditions SS SS based on package heat transfer, not device power consumption Table 7 “Limiting values” may cause permanent damage to the device. This is a stress rating only and Rev. 04 — 06 January 2004 P89LPC932 Min Max Unit 55 +125 65 +150 - ...
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... V; DD quasi-bidirectional mode I = 3.2 mA 2 push-pull mode mA 2 push-pull mode [ 2.4 V < V < 3 Rev. 04 — 06 January 2004 P89LPC932 [1] Min Typ Max - 3. <t.b.d.> 0.2 1 0.22V 0. 0 0.6V 0. ...
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... detect, and Watchdog timer. 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core for steady state (non-transient) limits on I Rev. 04 — 06 January 2004 P89LPC932 exceeds the test condition © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... Figure 22 - see Figure CLCL Figure CLCL see Figure 21 - Figure 21 - see Figure 21 150 - see Figures 23, 24, 25 500 - 333 Rev. 04 — 06 January 2004 P89LPC932 [ MHz OSC Max Min Max 7.557 7.189 7.557 480 280 480 125 - ...
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... Figures 0 25, 26 see Figures 25 see Figures 23, 24, 25 see Figures 0 23, 24, 25, 26 see Figures 23, 24, 25 see Figures 23, 24, 25 Rev. 04 — 06 January 2004 P89LPC932 [ MHz OSC Max Min Max - 250 - - 240 - - 250 - - 240 - - 340 - - 190 - - 340 - ...
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... 0 CHCL t CLCX t CLCL t SPIF t SPICLKL t SPICLKH t SPIF t SPIR t SPICLKL t SPICLKH t SPIDSU t SPIDH MSB/LSB in t SPIDV t SPIOH Master MSB/LSB out Rev. 04 — 06 January 2004 P89LPC932 Set TI Valid Valid Valid Valid Set RI 002aaa425 t CHCX t CLCH t C 002aaa416 t SPIR LSB/MSB in ...
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... SPIR t SPICLKL t SPICLKH t SPIR t SPICLKL t SPICLKH t SPIOH t SPIOH t SPIDV t SPIDV Slave MSB/LSB out t SPIDH t SPIDSU MSB/LSB in Rev. 04 — 06 January 2004 P89LPC932 t SPIR LSB/MSB in t SPIDV t SPIDV t SPIR Master LSB/MSB out 002aaa157 t SPIR t SPILAG t SPIOH t SPIDIS Slave LSB/MSB out Not defined t SPIDSU ...
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... SPIR t SPICLKL t SPICLKH t SPIR t SPICLKL t SPICLKH t SPIOH t SPIDV Slave MSB/LSB out t SPIDSU t SPIDH MSB/LSB in Conditions active Rev. 04 — 06 January 2004 P89LPC932 t SPIR t SPILAG t SPIOH t SPIDIS t SPIDV Slave LSB/MSB out t SPIDSU t SPIDSU t SPIDH LSB/MSB in 002aaa159 Min Typ Max ...
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... IL [1] This parameter is characterized, but not tested in production. 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core Conditions Min - 0 [ < V < Rev. 04 — 06 January 2004 P89LPC932 Typ Max Unit - 0 250 500 ...
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... 0.81 11.58 11.58 10.92 10.92 12.57 1.27 0.66 11.43 11.43 9.91 9.91 12.32 0.032 0.456 0.456 0.43 0.43 0.495 0.05 0.026 0.450 0.450 0.39 0.39 0.485 REFERENCES JEDEC JEITA MS-018 EDR-7319 Rev. 04 — 06 January 2004 P89LPC932 detail ( max. 12.57 1.22 1.44 0.18 0.18 0.1 2.16 12.32 1.07 1.02 0.495 ...
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... 2.5 scale (1) ( 0.30 0.2 9.8 4.5 0.65 0.19 0.1 9.6 4.3 REFERENCES JEDEC JEITA MO-153 Rev. 04 — 06 January 2004 P89LPC932 detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... 2.5 scale (1) ( 6.1 4.25 6.1 4.25 0.65 3.9 3.9 5.9 3.95 5.9 3.95 REFERENCES JEDEC JEITA MO-220 - - - Rev. 04 — 06 January 2004 P89LPC932 detail 0.75 0.05 0.1 0.1 0.05 0.50 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2004. All rights reserved. SOT788-1 ...
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... C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. Rev. 04 — 06 January 2004 P89LPC932 2.5 mm 350 called small/thin packages. ...
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... For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods . Rev. 04 — 06 January 2004 P89LPC932 Soldering method Wave not suitable [4] ...
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... Product data (9397 750 11712); ECN 853-2433 30141 dated 23 July 2003. Supersedes Preliminary data P89LPC932_1 of 21 October 2002 (9397 750 10475) 9397 750 12379 Product data 8-bit microcontroller with accelerated two-clock 80C51 core These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared refl ...
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... Licenses Purchase of Philips I Rev. 04 — 06 January 2004 P89LPC932 2 C components 2 Purchase of Philips I C components conveys a license 2 under the Philips’ ...
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... Document order number: 9397 750 12379 8-bit microcontroller with accelerated two-clock 80C51 core 14.1 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 14.2 Reflow soldering 14.3 Wave soldering 14.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 57 14.5 Package related soldering information . . . . . . 57 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . 58 16 Data sheet status Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 19 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 P89LPC932 ...