T89C5115 ATMEL Corporation, T89C5115 Datasheet - Page 79

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T89C5115

Manufacturer Part Number
T89C5115
Description
Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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Figure 36. ADC Description
Figure 37. Timing Diagram
Note:
ADC Converter
Operation
4128A–8051–04/02
Tsetup min = 4 us
Tconv=11 clock ADC = 1sample and hold + 10 bit conversion
The user must ensure that 4 us minimum time between setting ADEN and the start of the first conversion.
AN0/P1.0
AN1/P1.1
AN2/P1.2
AN3/P1.3
AN4/P1.4
AN5/P1.5
AN6/P1.6
AN7/P1.7
ADEOC
ADSST
ADEN
CLOCK
CLK
ADC
ADCON.2
SCH2
000
001
010
011
100
101
110
111
T
SETUP
ADCON.1
SCH1
Figure 37 shows the timing diagram of a complete conversion. For simplicity, the figure
depicts the waveforms in idealized form and do not provide precise timing information.
For ADC characteristics and timing parameters refer to the Section “AC Characteristics”
of the T89C5115 datasheet.
A start of single A/D conversion is triggered by setting bit ADSST (ADCON.3).
After completion of the A/D conversion, the ADSST bit is cleared by hardware.
The end-of-conversion flag ADEOC (ADCON.4) is set when the value of conversion is
available in ADDH and ADDL, it must be cleared by software. If the bit EADC (IEN1.1) is
set, an interrupt occur when flag ADEOC is set (see Figure 39). Clear this flag for re-
arming the interrupt.
The bits SCH0 to SCH2 in ADCON register are used for the analog input channel
selection.
ADCON.5
Sample and Hold
ADEN
CONTROL
ADCON.0
SCH0
AVSS
ADCON.3
ADSST
ADCIN
+
-
T
CONV
VAREF
ADEOC
ADCON.4
R/2R DAC
VAGND
SAR
EADC
IEN1.1
10
8
2
ADDH
ADDL
ADC
Interrupt
Request
T89C5115
79

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