T89C5115 ATMEL Corporation, T89C5115 Datasheet - Page 42

• Manufacturer Part Number: T89C5115
• Description: Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory
• Manufacturer: ATMEL Corporation

Serial I/O Port
42
Framing Error Detection
T89C5115
The T89C5115 I/O serial port is compatible with the I/O serial port in the 80C52.
It provides both synchronous and asynchronous communication modes. It operates as a
Universal Asynchronous Receiver and Transmitter (UART) in three full-duplex modes
(Modes 1, 2 and 3). Asynchronous transmission and reception can occur simultaneously
and at different baud rates
Serial I/O port includes the following enhancements:
•
•
Figure 18. Serial I/O Port Block Diagram
Framing bit error detection is provided for the three asynchronous modes. To enable the
framing bit error detection feature, set SMOD0 bit in PCON register.
Figure 19. Framing Error Block Diagram
When this feature is enabled, the receiver checks each incoming data frame for a valid
stop bit. An invalid stop bit may result from noise on the serial lines or from simultaneous
transmission by two CPUs. If a valid stop bit is not found, the Framing Error bit (FE) in
SCON register bit is set.
The software may examine the FE bit after each reception to check for data errors.
Once set, only software or a reset clears the FE bit. Subsequently received frames with
TXD
RXD
Framing error detection
Automatic address recognition
SM0/FE
SMOD1
Transmitter
SMOD0
SBUF
SM1
SM2
-
Mode 0 Transmit
Write SBUF
IB Bus
RI
REN
Set FE bit if stop bit is 0 (framing error)
SM0 to UART mode control
POF
To UART framing error control
TI
TB8
GF1
RB8
GF0
Shift register
Receive
Receiver
SBUF
PD
TI
IDL
RI
Load SBUF
Read SBUF
Serial Port
Interrupt
4128A–8051–04/02
Request