M27C64A-30F6X STMicroelectronics, M27C64A-30F6X Datasheet - Page 4

• Manufacturer Part Number: M27C64A-30F6X
• Description: 64 Kbit 8Kb x 8 UV EPROM and OTP EPROM
• Manufacturer: STMicroelectronics

M27C800
Table 5. AC Measurement Conditions
Figure 3. AC Testing Input Output Waveform
DEVICE OPERATION
The operating modes of the M27C800 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V
Electronic Signature.
Read Mode
The M27C800 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
signal level on the BYTEV
is at V
and the Q15A–1 pin is used for Q15 Data Output.
When the BYTEV
ganisation is selected and the Q15A–1 pin is used
for the Address Input A–1. When the memory is
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at V
4/17
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
High Speed
Standard
2.4V
0.4V
3V
0V
IH
the Word-wide organisation is selected
PP
pin is at V
PP
PP
and 12V on A9 for the
pin. When BYTEV
IL
the Byte-wide or-
1.5V
2.0V
0.8V
AI01822
IL
the
PP
High Speed
0 to 3V
1.5V
Figure 4. AC Testing Load Circuit
lower 8 bits of the 16 bit data are selected and with
A–1 at V
selected.
The M27C800 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
dress access time (t
from E to output (t
output after a delay of t
of G, assuming that E has been low and the ad-
dresses have been stable for at least t
10ns
C L = 30pF for High Speed
C L = 100pF for Standard
C L includes JIG capacitance
DEVICE
UNDER
TEST
IH
the upper 8 bits of the 16 bit data are
ELQV
AVQV
1.3V
GLQV
). Data is available at the
) is equal to the delay
1N914
3.3k
0.4V to 2.4V
0.8V and 2V
C L
from the falling edge
Standard
20ns
AVQV
OUT
AI01823B
-t
GLQV
.