M27C160-100B1TR STMicroelectronics, M27C160-100B1TR Datasheet - Page 3

• Manufacturer Part Number: M27C160-100B1TR
• Description: 16 Mbit 2Mb x8 or 1Mb x16 UV EPROM and OTP EPROM
• Manufacturer: STMicroelectronics

Table 2. Absolute Maximum Ratings
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
Table 3. Operating Modes
Note: X = V
Table 4. Electronic Signature
Note: Outputs Q8-Q15 are set to ’0’.
The M27C160 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
Read Word-wide
Read Byte-wide Upper
Read Byte-wide Lower
Output Disable
Program
Verify
Program Inhibit
Standby
Electronic Signature
Manufacturer’s Code
Device Code
Symbol
V
V
T
T
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
3. Depends on range.
V
V
A9
IO
BIAS
T
STG
CC
Identifier
PP
A
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
voltage on Output is V
(2)
(2)
IH
Mode
or V
IL
Ambient Operating Temperature
Temperature Under Bias
Storage Temperature
Input or Output Voltage (except A9)
Supply Voltage
A9 Voltage
Program Supply Voltage
, V
ID
= 12V
CC
V
A0
V
IH
IL
0.5V.
+0.5V with possible overshoot to V
V
IL
V
V
V
V
V
V
V
V
Pulse
E
IH
IH
IH
IL
IL
IL
IL
IL
Q7
0
1
Parameter
(1)
Q6
V
V
V
0
0
V
V
V
V
V
G
X
IH
IH
IH
IL
IL
IL
IL
IL
(3)
Q5
BYTEV
1
1
V
V
V
V
V
V
V
X
X
PP
PP
PP
CC
IH
IH
IL
IL
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
dress access time (t
from E to output (t
output after a delay of t
of G, assuming that E has been low and the ad-
dresses have been stable for at least t
PP
+2V for a period less than 20ns.
Q4
0
1
V
A9
X
X
X
X
X
X
X
X
ID
Q3
0
0
Data Out
Data Out
Data Out
Data Out
Data In
Q0-Q7
Codes
Q2
0
0
Hi-Z
Hi-Z
Hi-Z
ELQV
AVQV
GLQV
). Data is available at the
–40 to 125
–50 to 125
–65 to 150
Q1
–2 to 13.5
0
0
–2 to 14
) is equal to the delay
–2 to 7
–2 to 7
Value
Data Out
Data Out
Q8-Q14
Data In
Codes
from the falling edge
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Q0
0
1
AVQV
M27C160
Hex Data
Data Out
Data Out
Q15A–1
Data In
Code
Hi-Z
Hi-Z
Hi-Z
B1h
20h
-t
V
V
Unit
IH
GLQV
IL
V
V
V
V
C
C
C
3/16
.