M24512 STMicroelectronics, M24512 Datasheet

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M24512

Manufacturer Part Number
M24512
Description
512 Kbit Serial IC Bus EEPROM
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
These I
grammable memory (EEPROM) devices are or-
ganised as 64Kx8 bits, and operate down to 2.5 V
(for the -W version), and down to 1.8 V (for the -R
version).
The and M24512 are available in Plastic Dual-in-
Line, Plastic Small Outline and Thin Shrink Small
Outline packages.
These memory devices are compatible with the
I
Table 1. Signal Names
September 1999
This is preliminary information on a new product now in development. Details are subject to change without notice.
2
C extended memory standard. This is a two wire
Compatible with I
Two Wire I
Supports 400 kHz Protocol
Single Supply Voltage:
– 4.5V to 5.5V for M24512
– 2.5V to 5.5V for M24512-W
– 1.8V to 3.6V for M24512-R
Hardware Write Control
BYTE and PAGE WRITE (up to 128 Bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Behaviour
100000 Erase/Write Cycles (minimum)
40 Year Data Retention (minimum)
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
2
C-compatible electrically erasable pro-
2
C Serial Interface
2
C Extended Addressing
Chip Enable Inputs
Serial Data/Address Input/
Output
Serial Clock
Write Control
Supply Voltage
Ground
512 Kbit Serial I²C Bus EEPROM
Figure 1. Logic Diagram
E0-E2
SCL
WC
3
16
0.25 mm frame
V CC
8
PSDIP8 (BN)
300 mil width
V SS
SO16 (MJ)
M24512
1
1
PRODUCT PREVIEW
M24512
SDA
AI02275
1/16

Related parts for M24512

M24512 Summary of contents

Page 1

... V (for the -W version), and down to 1.8 V (for the -R version). The and M24512 are available in Plastic Dual-in- Line, Plastic Small Outline and Thin Shrink Small Outline packages. These memory devices are compatible with the ...

Page 2

... POR threshold value, all operations are disabled and the device will not th bit time, respond to any command. A stable and valid V must be applied before applying any logic signal. 1 Parameter PSDIP8: 10 sec SO8: 40 sec M24512 ...

Page 3

... A STOP condition terminates communica- tion between the memory device and the bus mas- ter. A STOP condition at the end of a Read ) IH BUS fc = 100kHz fc = 400kHz 100 C BUS (pF protocol for Bus SDA MASTER SCL C BUS 1000 M24512 C BUS AI01665 3/16 ...

Page 4

... M24512 2 Figure Bus Protocol SCL SDA START CONDITION SCL MSB SDA START CONDITION 1 SCL MSB SDA command, after (and only after) a NoAck, forces the memory device into its standby state. A STOP condition at the end of a Write command triggers the internal EEPROM write cycle. ...

Page 5

... Initial Sequence START, Device Select ‘1’ START, Device Select ‘0’, Address reSTART, Device Select ‘1’ Similar to Current or Random Address Read START, Device Select ‘0’ START, Device Select ‘0’ M24512 5/16 ...

Page 6

... M24512 Figure 5. Write Mode Sequences with WC=1 (data write inhibited) WC BYTE WRITE DEV SEL WC PAGE WRITE DEV SEL WC (cont'd) NO ACK PAGE WRITE (cont'd) NoAck. After each byte is transferred, the internal byte address counter (the 7 least significant bits only) is incremented. The transfer is terminated by the master generating a STOP condition ...

Page 7

... Current Address Read mode, following a START condition, the master sends a Device Select Code with the RW bit set to ‘1’. The memory acknowl- edges this, and outputs the byte addressed by the ACK ACK DATA IN ACK ACK DATA IN 1 DATA IN 2 AI01106B M24512 7/16 ...

Page 8

... M24512 Figure 7. Write Cycle Polling Flowchart using ACK First byte of instruction with already decoded by M24xxx NO ReSTART STOP internal address counter. The counter is then in- cremented. The master terminates the transfer with a STOP condition, as shown in Figure 8, with- out acknowledging the byte output. ...

Page 9

... BYTE ADDR BYTE ADDR R/W ACK ACK DATA OUT 1 R/W ACK ACK BYTE ADDR BYTE ADDR R/W NO ACK DATA OUT N ACK ACK NO ACK DEV SEL * DATA OUT R/W ACK NO ACK DATA OUT N ACK ACK ACK DEV SEL * DATA OUT 1 R/W AI01105C st th and 4 bytes) must be identical. M24512 9/16 ...

Page 10

... M24512 Table 7. DC Characteristics ( °C or – ° °C or – ° Symbol Parameter Input Leakage Current I LI (SCL, SDA) Input Leakage Current I LI (E2, E1, E0, WC) I Output Leakage Current LO -W series: I Supply Current CC -R series: ...

Page 11

... Figure 9. AC Testing Input Output Waveforms 0. 0. 0.2V CC 0. M24512 M24512 V =1 =2 70° 70° –40 to 85°C –20 to 85°C Min Max Min Max 300 ...

Page 12

... M24512 Figure 10. AC Waveforms SCL SDA IN START CONDITION SCL tCLQV SDA OUT SCL SDA IN tCHDH STOP CONDITION 12/16 tCHCL tDLCL tCHDX tCLDX SDA SDA INPUT CHANGE tCLQX DATA VALID DATA OUTPUT tW WRITE CYCLE tCLCH tDXCX tCHDH tDHDL STOP & BUS FREE tCHDX ...

Page 13

... Table 11. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. – M24512 Option T Tape and Reel Packing Temperature Range 5 –20 ° °C 6 –40 ° °C ...

Page 14

... M24512 Table 12. PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame Symb. Typ 7. 2. Figure 11. PSDIP8 (BN) B Note: 1. Drawing is not to scale. 14/16 mm Min. Max. 3.90 5.90 0.49 – 3.30 5.30 0.36 0.56 1.15 1.65 0.20 0.36 9.20 9.90 – – 6.00 6.70 – – 7.80 – 10.00 3.00 3. inches Typ ...

Page 15

... Min. Max. 2.59 0.10 0.30 0.38 0.51 0.23 0.25 10.11 10.49 7.44 7.54 – – 10.16 10.41 0.41 1027 0° 8° inches Typ. Min. 0.004 0.015 0.009 0.398 0.293 0.050 – 0.400 0.015 0.016 0° 45˚ M24512 Max. 0.102 0.012 0.020 0.010 0.413 0.297 – 0.410 0.050 8° 0.004 15/16 ...

Page 16

... M24512 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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