M95010 ST Microelectronics, M95010 Datasheet - Page 10

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M95010

Manufacturer Part Number
M95010
Description
4Kbit / 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock
Manufacturer
ST Microelectronics
Datasheet

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M95040, M95020, M95010
INSTRUCTIONS
Each instruction starts with a single-byte code, as
summarized in Table 4.
If an invalid instruction is sent (one not contained
in Table 4), the device automatically deselects it-
self.
Figure 8. Write Enable (WREN) Sequence
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set pri-
or to each WRITE and WRSR instruction. The only
way to do this is to send a Write Enable instruction
to the device.
10/33
S
C
D
Q
High Impedance
0
1
2
Instruction
3
4
Table 4. Instruction Set
Note: 1. A8 = 1 for the upper half of the memory array of the
As shown in Figure 8, to send this instruction to the
device, Chip Select (S) is driven Low, and the bits
of the instruction byte are shifted in, on Serial Data
Input (D). The device then enters a wait state. It
waits for a the device to be deselected, by Chip
Select (S) being driven High.
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruc
5
tion
2. X = Don’t Care.
6
M95040, and 0 for the lower half, and is Don’t Care for
other devices.
7
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
AI01441D
Description
0000 A
0000 A
Instruction
0000 X110
0000 X100
0000 X101
0000 X001
Format
8
8
011
010

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