AT28HC256E ATMEL Corporation, AT28HC256E Datasheet - Page 2

• Manufacturer Part Number: AT28HC256E
• Description: 256 32K x 8 High Speed Parallel EEPROMs
• Manufacturer: ATMEL Corporation

offers access times to 70 ns with power dissipation of just
440 mW. When the AT28HC256 is deselected, the standby
current is less than 5 mA.
The AT28HC256 is accessed like a Static RAM for the read
or write cycle without the need for external components.
The device contains a 64-byte page register to allow writing
of up to 64 bytes simultaneously. During a write cycle, the
address and 1 to 64 bytes of data are internally latched,
freeing the addresses and data bus for other operations.
Following the initiation of a write cycle, the device will auto-
matically write the latched data using an internal control
timer. The end of a write cycle can be detected by DATA
Block Diagram
Absolute Maximum Ratings*
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Temperature Under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to V
Voltage on OE and A9
with Respect to Ground ...................................-0.6V to +13.5V
AT28HC256
CC
+ 0.6V
polling of I/O
detected a new access for a read or write can begin.
Atmel’s 28HC256 has additional features to ensure high
quality and manufacturability. The device utilizes internal
error correction for extended endurance and improved data
retention characteristics. An optional software data protec-
tion mechanism is available to guard against inadvertent
writes. The device also includes an extra 64 bytes of
EEPROM for device identification or tracking.
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
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. Once the end of a write cycle has been