LP2975AIMM-12 National Semiconductor, LP2975AIMM-12 Datasheet - Page 17

• Manufacturer Part Number: LP2975AIMM-12
• Description: MOSFET LDO Driver/Controller
• Manufacturer: National Semiconductor

Application Hints
This application can also be improved by adding a feed-
forward capacitor. C
the gain plot (see graph LOW ESR CORRECTED WITH
FEED-FORWARD ).
The crossover frequency f
lected so that f
(which means V
erably improved. Calculating out all the poles and zeroes,
the phase margin is increased from 9˚ to 43˚ (adequate for
good stability).
EXCESSIVE GATE CAPACITANCE: Higher values of gate
capacitance shift the pole f
cause stability problems (see previous section GATE CA-
PACITANCE POLE FREQUENCY ). As shown in the graph
f
40 kHz and 500 kHz. How much phase shift this adds de-
pends on the crossover frequency f
The effect of gate capacitance becomes most important at
high values of ESR for the output capacitor (see graph HIGH
ESR UNSTABLE WITHOUT FEED-FORWARD ). Higher val-
ues of ESR increase f
tive gain portion of the curve. As f
quency
capacitance), this effect becomes even worse.
This points out why FET’s should be selected with the lowest
possible gate capacitance: it makes the design more tolerant
of higher ESR values on the output capacitor.
pg
vs. C
Low ESR Unstable without Feed-Forward
EFF
Low ESR Corrected with Feed-Forward
(corresponding
, the pole f
zf
OUT
is about 5 kHz, and f
F
= 5V), the phase margin will be consid-
will add both a zero f
c
pg
, which brings f
will likely fall somewhere between
c
pg
is now about 10 kHz. If C
to
to lower frequencies, which can
(Continued)
higher
pg
c
.
moves to a lower fre-
pg
pf
more into the posi-
values
DS100034-30
DS100034-32
is about 20 kHz
zf
and pole f
of
F
is se-
gate
pf
to
17
The use of a feed-forward capacitor C
cess phase shift due to f
output voltage (see next section).
LOW OUTPUT VOLTAGE AND C
The feed-forward capacitor C
shift (lead) which can be used to cancel some of the excess
phase lag from any of the various poles present in the loop.
However, it is important to note that the effectiveness of C
decreases with output voltage.
This is due to the fact that the frequencies of the zero f
pole f
(see equations in section FEED-FORWARD COMPENSA-
TION ).
C
apart, because there is less self cancellation. The net benefit
in phase shift provided by C
lead (positive phase shift) from f
phase shift) from f
quency f
other, that difference diminishes to nothing.
The amount of phase lead at f
both on the f
To illustrate this more clearly, a graph is provided which
shows how much phase lead can be obtained for V
12V, 5V, and 3.3V (see graph PHASE LEAD PROVIDED BY
C
The most important information on the graph is the fre-
quency range of f
(most positive phase shift):
For V
For V
For V
It’s also important to note how the maximum available phase
shift that C
than 50˚ can be obtained, but at 3.3V less than 30˚ is pos-
sible. The lesson from this is that higher voltage designs are
more tolerant of phase shifts from both f
tance pole) and incorrect placement of f
output capacitor ESR is not at its nominal value). At lower
values of V
selected since C
GENERAL DESIGN PROCEDURE
Assuming that V
F
F
).
is more effective when the pole-zero pair are farther
pf
OUT
OUT
OUT
get closer together as the output voltage is reduced
c
. As the pole and zero frequency approach each
= 12V: 0.1 f
= 5V: 0.2 f
= 3.3V: 0.2 f
F
OUT
zf/
can provide drops off with V
f
pf
Phase Lead Provided by C
, these parameters must be more precisely
IN
ratio and the location of f
F
zf
, V
can not provide as much correction.
pf
which will provide the maximum benefit
c
which is present at the crossover fre-
OUT
c
<
c
<
pg
<
, and R
f
z
, but its effectiveness depends on
f
z
f
<
z
F
<
<
F
is the difference between the
1.2 f
1.0 f
will provide a positive phase
1.3 f
C
L
are defined:
F
provided by C
c
zf
c
c
and the lag (negative
F
will help reduce ex-
pg
z
z
OUT
(which means the
with respect to f
(the gate capaci-
DS100034-33
F
. At 12V, more
www.national.com
F
depends
OUT
zf
and
c
=
F
.