ADG725 Analog Devices, ADG725 Datasheet - Page 7

• Manufacturer Part Number: ADG725
• Description: 16-/32- Channel/ Serially Controlled 4 1.8 V to 5.5 V/ 2.5 V/ Analog Multiplexers
• Manufacturer: Analog Devices

ADG725
REV. PrD
NC = NO CONNECT
ADG731
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
10
11
12
1
2
3
4
5
6
7
8
9
Mnemonic Function
SCLK
D I N
S X X
D X
V
G N D
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
DD
PIN 1
IDENTIFIER
PRELIMINARY TECHNICAL DATA
(Not to Scale)
TOP VIEW
ADG731
43 42 41 40
Serial Clock Input. Data is clocked into the input shift register on the falling edge of
the serial clock input. These devices can accomodate serial input rates of up to
30MHz.
Active low control input that clears the input register and turns all switches to the
OFF condition.
Serial Data Input. Data is clocked into the 8-bit input register on the falling edge of
the serial clock input.
Source. May be an input or output.
Drain. May be an input or output.
Power Supply Input. These parts can be operated from a supply of +1.8V to +5.5V
and dual supply of +/-2.5V.
Ground reference.
Active Low Control Input. This is the frame synchronization signal for the input
data. When
shift register is enabled. An 8-bit counter is also enabled. Data is transferred on the
falling edges of the following clocks. After 8 falling clock edges, switch conditions
are automaticaly updated.
for a short period of time to enable the counter and input buffers.
39 38 37
PIN FUNCTION DESCRIPTION
PIN CONFIGURATIONS
36
35
34
33
32
31
30
29
28
26
25
27
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
CSP & TQFP
goes low, it powers on the SCLK and DIN buffers and the input
–7–
NC = NO CONNECT
S12A
S11A
S10A
S9A
S8A
S7A
S6A
S5A
S4A
S3A
S2A
S1A
may be used to frame the signal, or just pulled low
10
11
12
1
2
3
4
5
6
7
8
9
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
(Not to Scale)
TOP VIEW
ADG725
43 42 41 40
39 38 37
ADG725/ADG731
36
35
34
33
32
31
30
29
28
27
26
25
S12B
S11B
S10B
S9B
S8B
S7B
S6B
S5B
S4B
S3B
S2B
S1B