A29010 AMICC [AMIC Technology], A29010 Datasheet - Page 7

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A29010

Manufacturer Part Number
A29010
Description
128K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory
Manufacturer
AMICC [AMIC Technology]
Datasheet
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and
erase operations in previously protected sectors.
Sector protection/unprotection must be implemented using
programming equipment. The procedure requires a high
voltage (V
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
V
powered up to read array data to avoid accidentally writing
data to the array.
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on
do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of
Power-Up Write Inhibit
If
device does not accept commands on the rising edge of
reading array data on the initial power-up.
Command Definitions
Writing specific address and data commands or sequences
into the command register initiates device operations. The
Command Definitions table defines the valid register
command sequences. Writing incorrect address and data
values or writing them in the improper sequence resets the
device to reading array data.
All addresses are latched on the falling edge of
whichever happens later. All data is latched on the rising
edge of
appropriate timing diagrams in the "AC Characteristics"
section.
PRELIMINARY
CE
WE
WE
CC
WE
power-up transitions, or from system noise. The device is
= V
. The internal state machine is automatically reset to
must be a logical zero while
=
IH
WE
ID
CE
or
) on address pin A9 and the control pins.
or
WE
= V
CE
(August, 2001, Version 0.3)
IL
= V
, whichever happens first. Refer to the
and
IH
. To initiate a write cycle,
OE
= V
OE
IH
is a logical one.
during power up, the
OE
,
WE
CE
OE
CE
or
or
=V
WE
CE
and
IL
,
,
7
Reading Array Data
The device is automatically set to reading array data after
device power-up. No commands are required to retrieve
data. The device is also ready to read array data after
completing an Embedded Program or Embedded Erase
algorithm. After the device accepts an Erase Suspend
command, the device enters the Erase Suspend mode. The
system can read array data using the standard read timings,
except that if it reads at an address within erase-suspended
sectors, the device outputs status data. After completing a
programming operation in the Erase Suspend mode, the
system may once again read array data with the same
exception. See "Erase Suspend/Erase Resume Commands"
for more information on this mode.
The system must issue the reset command to re-enable the
device for reading array data if I/O
autoselect mode. See the "Reset Command" section, next.
See also "Requirements for Reading Array Data" in the
"Device Bus Operations" section for more information. The
Read Operations table provides the read parameters, and
Read Operation Timings diagram shows the timing diagram.
Reset Command
Writing the reset command to the device resets the device to
reading array data. Address bits are don't care for this
command. The reset command may be written between the
sequence cycles in an erase command sequence before
erasing begins. This resets the device to reading array data.
Once erasure begins, however, the device ignores reset
commands until the operation is complete.
The reset command may be written between the sequence
cycles
programming begins. This resets the device to reading array
data (also applies to programming in Erase Suspend mode).
Once programming begins, however, the device ignores
reset commands until the operation is complete.
The reset command may be written between the sequence
cycles in an autoselect command sequence. Once in the
autoselect mode, the reset command must be written to
return to reading array data (also applies to autoselect during
Erase Suspend).
If I/O
the reset command returns the device to reading array data
(also applies during Erase Suspend).
5
goes high during a program or erase operation, writing
in
a
program
AMIC Technology, Inc.
command
A29010 Series
5
goes high, or while in the
sequence
before

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