F25L008A-100DG ESMT [Elite Semiconductor Memory Technology Inc.], F25L008A-100DG Datasheet - Page 24
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F25L008A-100DG
Manufacturer Part Number
F25L008A-100DG
Description
8Mbit (1Mx8) 3V Only Serial Flash Memory
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
1.F25L008A-100DG.pdf
(31 pages)
ESMT
TABLE 11: RELIABILITY CHARACTERISTICS
1.
TABLE 12 : AC OPERATING CHARACTERISTICS T
1. Relative to SCK.
Elite Semiconductor Memory Technology Inc.
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
N
T
I
LTH
CLK
SCKH
SCKL
LZ
OH
V
DR
CES
CEH
CHS
CHH
CPH
CHZ
CLZ
DS
DH
HLS
HHS
HLH
HHH
HZ
END
This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
Symbol
Symbol
1
1
1
1
1
1
1
Endurance
Data Retention
Latch Up
Serial Clock Frequency
Serial Clock High Time
Serial Clock Low Time
SCK Low to Low-Z Output
Data In Setup Time
Data In Hold Time
Output Hold from SCK Change
Output Valid from SCK
HOLD Low Setup Time
HOLD High Setup Time
HOLD Low Hold Time
HOLD High Hold Time
HOLD Low to High-Z Output
HOLD High to Low-Z Output
CE Active Setup Time
CE Active Hold Time
CE Not Active Setup Time
CE Not Active Hold Time
CE High Time
CE High to High-Z Output
Parameter
Parameter
Normal 33MHz Fast 50 MHz Fast 100 MHz
VDD=2.7~3.6V VDD=2.7~3.6V VDD=3.0~3.6V
Min
100
13
13
5
5
5
5
0
3
3
5
5
5
5
0
Minimum Specification
Max
33
12
9
9
9
A=
100 + IDD
0~70
100,000
Min
100
10
9
9
5
5
5
5
0
3
3
5
5
5
5
0
o
C
Max
50
9
9
9
8
Min
100
5
3
5
5
5
5
5
5
5
5
5
0
3
0
Publication Date: May. 2007
Cycles
Years
Units
mA
Max
100
9
9
9
7
Revision:
Units
JEDEC Standard A117
JEDEC Standard A103
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
F25L008A
JEDEC Standard 78
1.4
Test Method
24/31