LCMXO1200 LATTICE [Lattice Semiconductor], LCMXO1200 Datasheet - Page 92

• Manufacturer Part Number: LCMXO1200
• Description: MachXO Family Data Sheet
• Manufacturer: LATTICE [Lattice Semiconductor]

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© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
November 2007
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site at www.latticesemi.com.
For further information on interface standards refer to the following web sites:
• MachXO sysIO Usage Guide (TN1091)
• MachXO sysCLOCK PLL Design and Usage Guide (TN1089)
• MachXO Memory Usage Guide (TN1092)
• Power Estimation and Management for MachXO Devices (TN1090)
• MachXO JTAG Programming and Configuration User’s Guide (TN1086)
• Minimizing System Interruption During Configuration Using TransFR Technology (TN1087)
• MachXO Density Migration (TN1097)
• IEEE 1149.1 Boundary Scan Testability in Lattice Devices
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
6-1
MachXO Family Data Sheet
Supplemental Information
DS1002 Further Information_01.2
Data Sheet DS1002