TMC457_1 TRINAMIC [TRINAMIC Motion Control GmbH & Co. KG.], TMC457_1 Datasheet - Page 15

• Manufacturer Part Number: TMC457_1
• Description: S-profile motion controller with PID feedback control and high resolution micro stepping sequencer for stepper motors and piezo motors
• Manufacturer: TRINAMIC [TRINAMIC Motion Control GmbH & Co. KG.]

TMC457 DATASHEET (V. 1.16 / 2009-Nov-25)
MSB (transmited first)
39 ...
3
9
6.1.2
All data are right aligned. Some registers represent positive value, some represent integer values
(signed) as two complement numbers, single bits or groups of bits are represented as single bits
respectively as integer groups.
6.2 Register Block Structure – Register Mapping
All parameterizations take place by register writes. The access to the registers is via SPI. The ramp
generator register set enfolds basic motion control parameters, a ramp generator register set, an
incremental encoder register set, a PID controller register set – named easyPID
output configuration register set, a reference switch configuration register set, a micro step sequencer
configuration register, a type & version register, an interrupt configuration register, and a sine wave
look-up table (LUT) RAM port register.
6.2.1
Units are written in are given in brackets, e.g. [micro steps]. Read only registers are designated by R.
Read only registers with automatic clear (C) on read are designated by R+C. Registers that are cleared
on write are designated by W+C. Write only registers are designated by W.
6.2.2
Time is scaled by the the clock frequency of the TMC457. This scales velocity, acceleration, and bow.
So, velocity is given in unit [micro steps per time] and not as [micro steps per second], acceleration is
given in unit [micro steps per time^2] and not unit [micro steps per second^2]. Formulas for the
conversion into units based on time in seconds is given in section 0, page 26.
Copyright © 2009 TRINAMIC Motion Control GmbH & Co. KG
1 + 7 bit ADDRESS
8 bit ADDRESS
3
8
39 / 38 ... 32
3
7
39 ... 32
38...32
3
6
Data Alignment
Nomenclature of Read / Write / Clear on Read / Clear on Write of Registers
Time Scaling by Clock Frequency
3
5
3
4
3
3
3
2
3
1
31...28
3
0
8 bit DATA
2
9
31 ... 24
2
8
2
7
27...24
2
6
TMC457 SPI Datagram Structure
2
5
2
4
2
3
23...20
2
2
8 bit DATA
2
1
23 ... 16
40 bit
2
0
1
9
19...16
1
8
32 bit DATA
1
7
31 ... 0
1
6
1
5
15...12
1
4
8 bit DATA
1
3
15 ... 8
1
2
1
1
11...8
1
0
9 8 7 6 5 4 3 2 1 0
TM
LSB (transmitted last)
, a step direction
7...4
8 bit DATA
7 ... 0
3...0
15
... 0