TMC457_1 TRINAMIC [TRINAMIC Motion Control GmbH & Co. KG.], TMC457_1 Datasheet - Page 14

• Manufacturer Part Number: TMC457_1
• Description: S-profile motion controller with PID feedback control and high resolution micro stepping sequencer for stepper motors and piezo motors
• Manufacturer: TRINAMIC [TRINAMIC Motion Control GmbH & Co. KG.]

TMC457 DATASHEET (V. 1.16 / 2009-Nov-25)
6 Register Mapping
6.1 SPI Datagram Structure
The TMC457 uses 40 Bit SPI
for communication with a micro controller. Micro controllers which are equipped with hardware SPI are
typically able to communicate with integer multiples of 8 bit.
Each datagram of the TMC457 is composed of an address byte followed by four data bytes. This
allows direct 32 bit data word communication with the register set of the TMC457. To have a unified
kind of communication, each register is accessed via 32 data bits even if it used less then 32 data bits.
For simplification, each register is specified by a one byte address, where the reading address is given
with the most significant bit = '0'. For a write access, the most significant bit of the address byte is '1'.
Most registers are write only registers, some can be read additionally, and there are also some read
only registers.
MSB (transmitted first)
39 ...
3
9
3
9
6.1.1
The read and write selection is controlled by the MSB of the address byte (bit 39 of the SPI datagram).
This bit is '0' for read access and '1' for write access. So, the bit named W is a WRITE_notREAD
control bit. The active high write bit is the MSB of the address byte. So, 0x80 has to be added to the
address for a write access.
Example: For a read access from the register (x_actual) with the address 0x01, the address byte has
to be set to 0x01. For a write access to the register (x_actual) with the address 0x10, the address byte
has to be set to 0x80 + 0x01 = 0x81. For read access, the data bit might have any value ('-'). So, one
can set them to '0'.
Copyright © 2009 TRINAMIC Motion Control GmbH & Co. KG
1 + 7 bit ADDRESS
8 bit ADDRESS
8 bit ADDRESS
3
8
39 / 38 ... 32
3
7
39 ... 32
39 ... 32
ADDRESS
38...32
3
6
READ x_actual
WRITE x_actual := 0x89ABCDEF;
Selection of Write / Read (WRITE_notREAD)
3
5
3
4
3
3
3
2
3
1
31...28
3
0
8 bit DATA
8 bit DATA
8 bit DATA
2
9
31 ... 24
31 ... 24
2
8
TM
2
7
(Serial Peripheral Interface, SPI is Trademark of Motorola) datagrams
TMC457 40 Bit SPI Datagram Structure
27...24
2
6
2
5
2
4
2
3
23...20
2
2
8 bit DATA
8 bit DATA
8 bit DATA
2
1
datagram  0x01000000000;
datagram  0x8189ABCDEF;
23 ... 16
23 ... 16
2
0
1
9
19...16
1
8
32 bit DATA
1
7
31 ... 0
1
6
1
5
15...12
1
4
8 bit DATA
8 bit DATA
8 bit DATA
1
3
15 ... 8
15 ... 8
1
2
1
1
11...8
1
0
9 8 7 6 5 4 3 2 1 0
LSB (transmitted last)
7...4
8 bit DATA
8 bit DATA
8 bit DATA
7 ... 0
7 ... 0
3...0
14
... 0