AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 21

• Manufacturer Part Number: AGL015
• Description: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
• Manufacturer: MICROSEMI [Microsemi Corporation]

Figure 2-2 • V2 Devices – I/O State as a Function of VCCI and VCC Voltage Levels
Deactivation trip point:
Activation trip point:
V
V
a
d
= 0.85 V ± 0.2 V
= 0.75 V ± 0.2 V
VCC = 1.575 V
VCC = 1.14 V
Thermal Characteristics
Introduction
The temperature variable in the Designer software refers to the junction temperature, not the ambient
temperature. This is an important distinction because dynamic and static power consumption cause the
chip junction to be higher than the ambient temperature.
EQ 1
where:
T
ΔT = Temperature gradient between junction (silicon) and ambient ΔT = θ
θ
P = Power dissipation
VCC
ja
A
= Ambient Temperature
= Junction-to-ambient of the package. θ
T
J
can be used to calculate junction temperature.
= Junction Temperature = ΔT + T
Deactivation trip point:
Region 1: I/O Buffers are OFF
Activation trip point:
V
V
VCC = VCCI + VT
where VT can be from 0.58 V to 0.9 V (typically 0.75 V)
a
d
= 0.9 V ± 0.15 V
= 0.8 V ± 0.15 V
Region 1: I/O buffers are OFF
Region 2: I/O buffers are ON.
I/Os are functional (except differential inputs)
but slower because VCCI/VCC are below
specification. For the same reason, input
buffers do not meet VIH/VIL levels, and
output buffers do not meet VOH/VOL levels.
buffers do not meet VOH / VOL levels.
meet VIH / VIL levels, and output
same reason, input buffers do not
below specification. For the
but slower because VCCI is
(except differential inputs)
A
I/Os are functional
ja
R ev i si o n 1 9
numbers are located in
buffers are ON.
Region 4: I/O
standard; i.e., 1.14 V,1.425 V, 1.7 V,
Min VCCI datasheet specification
voltage at a selected I/O
2.3 V, or 3.0 V
Region 3: I/O buffers are ON.
I/Os are functional; I/O DC
specifications are met,
but I/Os are slower because
the VCC is below specification.
speed, VIH / VIL , VOH / VOL , etc.
Region 5: I/O buffers are ON
and power supplies are within
specification.
I/Os meet the entire datasheet
and timer specifications for
Table 2-5 on page
IGLOO Low Power Flash FPGAs
ja
* P
2-6.
VCCI
EQ 1
2 -5