ISPPACCLK5610AV-01T100C LATTICE [Lattice Semiconductor], ISPPACCLK5610AV-01T100C Datasheet - Page 46

• Manufacturer Part Number: ISPPACCLK5610AV-01T100C
• Description: In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
Package Diagrams
48-Pin TQFP (Dimensions in Millimeters)
NOTES:
1.
2.
4.
5. THE TOP OF PACKAGE MAY BE SMALLER THAN THE BOTTOM
6.
7.
8.
3.
DIMENSIONING AND TOLERANCING PER ANSI Y14.5 - 1982.
ALL DIMENSIONS ARE IN MILLIMETERS.
DATUMS A, B AND D TO BE DETERMINED AT DATUM PLANE H.
DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION.
ALLOWABLE MOLD PROTRUSION IS 0.254 MM ON D1 AND E1
DIMENSIONS.
OF THE PACKAGE BY 0.15 MM.
SECTION B-B:
THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.10 AND 0.25 MM FROM THE LEAD TIP.
A1 IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE
TO THE LOWEST POINT ON THE PACKAGE BODY.
EXACT SHAPE OF EACH CORNER IS OPTIONAL.
c
0.08
SECTION B - B
3.
e
8.
M C
A
4X
PIN 1 INDICATOR
1
A -B D
b
b
b
1
N
D
D
c
1
SEE DETAIL "A"
3.
BASE METAL
LEAD FINISH
B 3.
C
0.20
SEATING PLANE
E
C A-B D
1-46
0.08 C
A
ispClock5600A Family Data Sheet
0.20
A2
A1
H
E1
SYMBOL
0.20 MIN.
A-B
1.00 REF.
A
A1
A2
D
D1
E
E1
L
N
e
b
b1
c
c1
DETAIL "A"
H
D
0.05
1.35
0.45
0.17
0.17
0.09
0.09
MIN.
-
D1
9.00 BSC
7.00 BSC
9.00 BSC
7.00 BSC
0.50 BSC
1.40
0.60
NOM.
48
0.15
0.13
0.20
-
-
0.22
GAUGE PLANE
L
0-7∞
MAX.
1.60
0.15
1.45
0.75
0.27
0.23
0.20
0.16
0.25