WM9714L_06 WOLFSON [Wolfson Microelectronics plc], WM9714L_06 Datasheet - Page 23

• Manufacturer Part Number: WM9714L_06
• Description: AC 97 Audio CODEC
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Pre-Production
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CONTROL
The register bits controlling PCM audio format, word length and operating modes are summarised
below. CTRL must be set to override the normal use of the PCM interface pins as GPIOs, MODE
must be set to specify master/slave modes.
36h
PCM
Control
REGISTER
ADDRESS
15
14:13
11:9
8
7
6
5:4
BIT
CTRL
MODE
DIV
VDACOS
R
CP
FSP
SEL
LABEL
DEFAULT
0
10
010
1
0
0
10
Sets function and control registers for GPIO /
PCM interface pins.
0 = GPIO pins as GPIOs
1 = GPIO pins configured as PCM interface
PCM interface mode when CTRL=1
00 = PCM interface disabled [PCMCLK tri-
01 = PCM interface in slave mode [PCMCLK
10 = PCM interface in master mode [PCMCLK
11 = PCM interface in partial master mode
Voice DAC clock to PCMCLK divider. In
master mode PCMCLK is derived from Voice
DAC clock.
000 : PCMCLK = Voice DAC clock
001 : PCMCLK = Voice DAC clock / 2
010 : PCMCLK = Voice DAC clock / 4
011 : PCMCLK = Voice DAC clock / 8
100 : PCMCLK = Voice DAC clock / 16
VXDAC oversample rate:
0: 128 x fs
1: 64 x fs
PCMCLK polarity
1 = invert PCMCLK polarity
0 = normal PCMCLK polarity
Right, Left and I
1 = invert PCMFS polarity
0 = normal PCMFS polarity
DSP Mode – mode A/B select
0 = MSB is available on 2nd PCMCLK rising
1 = MSB is available on 1st PCMCLK rising
PCM ADC channel select
00 = Output left and right ADC data
01 = Swap and output left and right ADC data
10 = Output left ADC data only
11 = Output right ADC data only
and controlled by this register
stated, PCMFS tri-stated]
as input, PCMFS as input]
as output, PCMFS as output]
[PCMCLK as output, PCMFS as input]
edge after LRC rising edge (mode A)
edge after LRC rising edge (mode B)
DESCRIPTION
2
S modes – PCMFS polarity
PP Rev 3.0 June 2006
WM9714L
23