LF3320QC15 LODEV [LOGIC Devices Incorporated], LF3320QC15 Datasheet - Page 15

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LF3320QC15

Manufacturer Part Number
LF3320QC15
Description
Horizontal Digital Image Filter
Manufacturer
LODEV [LOGIC Devices Incorporated]
Datasheet
DEVICES INCORPORATED
There are sixteen limit registers for Filter
A and sixteen for Filter B. Each register
is 32-bits wide and stores both an upper
and lower limit value. The lower limit is
stored in bits 15-0 and the upper limit is
stored in bits 31-16. RSLA
RSLB
limit registers respectively are used for
limiting when limiting is enabled.
Configuration and control register
loading is discussed in the LF
Interface
LF Interface
The Filter A and B LF Interfaces
used to load data into the Filter A and B
coefficient banks respectively. They are
also used to load data into the configu-
ration and control registers.
The following section describes how
the Filter A LF Interface
Filter A and B LF Interfaces
identical in function. If LDA and
CFA
CFB
describe how the Filter B LF Interface
works.
LDA is used to enable and disable the
Filter A LF Interface
LOW, the Filter A LF Interface
enabled for data input. The first value
fed into the interface on CFA
address which determines what the
interface is going to load. The three
most significant bits (CFA
mine if the LF Interface
coefficient banks or
Configuration/control registers (see
Table 8). The nine least significant bits
(CFA
is to be loaded (see Tables 9 through
14). For example, to load address 15 of
the Filter A coefficient banks, the first
data value into the LF Interface
should be 00FH. To load Filter A limit
register 10, the first data value should
be C0AH. The first address value
should be loaded into the interface on
the same clock cycle that latches the
HIGH to LOW transition of LDA (see
Figures 17 and 18).
11-0
11-0
8-0
3-0
, the following section will
) are the address for whatever
determine which Filter A and B
are replaced with LDB and
TM
section.
TM
TM
. When LDA goes
TM
TM
will load
3-0
11-9
works. The
TM
and
11-0
) deter-
are
TM
TM
TM
are
is an
is
TM
The next value(s) loaded into the
interface are the data value(s) which
will be stored in the bank or register
defined by the address value. When
loading coefficient banks, the interface
will expect eight values to be loaded
into the device after the address value.
The eight values are coefficients 0
through 7. When loading configura-
tion or select registers, the interface
will expect one value after the address
value. When loading round or limit
registers, the interface will expect four
values after the address value. Figures
11 and 12 show the data loading
sequences for the coefficient banks and
Configuration/control registers.
Both PAUSEA and PAUSEB allow the
user to effectively slow the rate of data
loading through the LF Interface
When PAUSEA is HIGH, the LF
Interface
Filter A is held until PAUSEA is
returned to a LOW. When PAUSEB is
T
T
ABLE
ABLE
BITS
BITS
11-2
11-6
0
1
0
1
2
3
4
5
TM
6. C
7. C
affecting the data used for
FUNCTION
Filter B Limit Enable
Filter A Limit Enable
Reserved
FUNCTION
Cascade Mode
Single/Dual Filter Mode
Filter B Input
Output Adder Control
Matrix Multiply Mode
Accumulator Access Mode
Reserved
ONFIGURATION
ONFIGURATION
2-15
TM
R
R
.
EGISTER
EGISTER
Horizontal Digital Image Filter
0 : Limiting Disabled
DESCRIPTION
1 : Limiting Enabled
1 : Limiting Enabled
Must be set to “0”
DESCRIPTION
0 : Last In Line
1 : First or Middle in Line
0 : Single Filter Mode
1 : Dual Filter Mode
0 : RIN
1 : DIN
0 : Filter A + Filter B
1 : Filter A + Filter B (Filter B Scaled by 2
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
Must be set to “0”
0 : Limiting Disabled
HIGH, the LF Interface
used for Filter B is held until PAUSEB is
returned to a LOW. Figures 19 through 22
display the effects of both PAUSEA and
PAUSEB while loading coefficient and
control data.
Table 15 shows an example of loading
data into the coefficient banks. The
following data values are written into
address 10 of coefficient banks 0
through 7: 210H, 543H, C76H, 9E3H,
701H, 832H, F20H, 143H. Table 16
shows an example of loading data into
a Configuration Register. Data value
003H is written into Configuration
Register 4. Table 17 shows an example
of loading data into a round register.
Data value 7683F4A2H is written into
Filter A round register 12.
Table 18 shows an example of loading
data into a select register. Data value
00FH is loaded into Filter A select
register 2. Table 19 shows an example
Video Imaging Products
4 – A
5 – A
11-0
11-0
DDRESS
DDRESS
204H
205H
TM
affecting the data
08/16/2000–LDS.3320-N
LF3320
-12
)

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