ATA5771_09 ATMEL [ATMEL Corporation], ATA5771_09 Datasheet - Page 69

• Manufacturer Part Number: ATA5771_09
• Description: Microcontroller with UHF ASK/FSK Transmitter
• Manufacturer: ATMEL [ATMEL Corporation]

6.2.1
16
ATtiny24/44/84
Data Memory Access Times
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 128/256/512 bytes of inter-
nal data SRAM in the ATtiny24/44/84 are all accessible through all these addressing modes.
The Register File is described in
Figure 6-2.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
16.
Figure 6-3.
Data Memory Map
On-chip Data SRAM Access Cycles
Address
clk
Data
Data
WR
CPU
RD
(128/256/512 x 8)
64 I/O Registers
Data Memory
Internal SRAM
Compute Address
32 Registers
”General Purpose Register File” on page
T1
Memory Access Instruction
0x0DF/0x015F/0x025F
0x0000 - 0x001F
0x0020 - 0x005F
0x0060
Address valid
CPU
T2
cycles as described in
Next Instruction
T3
10.
Figure 6-3 on page
7701C–AVR–12/08