LMP8358MA NSC [National Semiconductor], LMP8358MA Datasheet - Page 7

• Manufacturer Part Number: LMP8358MA
• Description: Zero-Drift, Programmable Instrumentation Amplifier with Diagnostics
• Manufacturer: NSC [National Semiconductor]

I
V
V
V
V
I
I
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
TEST
SDO
OZ
1
2
3
4
5
6
7
8
9
10
11
r
/t
Symbol
IL
IH
OL
OH
Electrical Characteristics (Serial Interface)
Unless otherwise specified, all limits guaranteed for T
(VHSER/VLPAR) − (VLSER/VHPAR)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but for which specific performance is not guaranteed. For guaranteed specifications and the test conditions, see Electrical Characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22–A115–A (ESD MM std. of JEDEC). Field-
Induced Charge-Device Model, applicable std. JESD22–C101–C (ESD FICDM std. of JEDEC).
Note 3: The short circuit test is a momentary test which applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated
ambient temperature can exceed the maximum allowable junction temperature of 150°C.
Note 4: The maximum power dissipation is a function of T
P
Note 5: Typical Values indicate the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: All limits are guaranteed by testing or statistical analysis.
f
D
= (T
J(MAX)
Fault Detection: Test Current
Input Logic Low Threshold
Input Logic High Threshold
Output Logic Low Threshold
Output Logic High Threshold
Output Source Current, SDO
Output Sink Current, SDO
Output Tri-state Leakage Current,
SDO
High Period, SCK
Low Period, SCK
Set Up Time, CSB to SCK
Set Up Time, SDI to SCK
Hold Time, SCK to SDI
Prop. Delay, SCK to SDO
Hold Time, SCK Transition to CSB
Rising Edge
CSB Inactive
Prop. Delay, CSB to SDO Active
Prop. Delay, CSB to SDO Inactive
Hold Time, SCK Transition to CSB
Falling Edge
Signal Rise and Fall Times
– T
A
)/ θ
JA
. All numbers apply for packages soldered directly onto a PC Board.
Parameter
Parameter
≥
2.5V.
I
I
V
CSB = 0V, V
V
CSB = 0V, V
V
CSB = V
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
SDO
SDO
J(MAX)
D
D
D
Setting 1 (CUR[2:0] = 001b), V
2.25V
Setting 2 (CUR[2:0] = 010b), V
2.25V
Setting 3 (CUR[2:0] = 011b), V
2.25V
Setting 4 (CUR[2:0] = 100b), V
2.25V
Setting 5 (CUR[2:0] = 101b), V
2.25V
= 3.3V or 5.0V,
= 3.3V or 5.0V,
= 3.3V or 5.0V,
= 2mA
= 2mA
, θ
9)
9)
9)
9)
9)
9)
9)
9)
9)
9)
9)
9)
A
JA
= 25°C, V
D
. The maximum allowable power dissipation at any ambient temperature is
= 3.3V or 5V
Conditions
OH
OL
= 1.0V
= V
Conditions
7
+
+
− V
– 0.7V
−
≥
2.7V, V
CM
CM
CM
CM
CM
+
< V
< V
< V
< V
< V
≥
V
VHSER/VLPAR, V
0.7 × V
(Note
+
+
+
+
+
D
−
−
−
Min
100
100
−
−
− 0.2V
1.5
−2
50
30
10
50
50
10
2
(Note
6)
D
Min
(Note
6)
Typ
(Note
Typ
100
100
−
5)
10
10
1
≤
VLSER/VHPAR, V
5)
(Note
0.3 × V
(Note
Max
0.2
±1
60
50
50
5
Max
6)
D
www.national.com
6)
Units
Units
mA
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nA
nA
µA
µA
µA
V
V
V
D
=