SC68C752BIB48 PHILIPS [NXP Semiconductors], SC68C752BIB48 Datasheet
SC68C752BIB48
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SC68C752BIB48 Summary of contents
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SC68C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and Motorola P interface Rev. 03 — 29 November 2005 1. General description The SC68C752B is a dual Universal Asynchronous Receiver/Transmitter (UART) with 64-byte ...
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... Internal test and loopback capabilities Fully prioritized interrupt system controls Modem control functions (CTS, RTS, DSR, DTR, RI, and CD) 3. Ordering information Table 1: Type number SC68C752BIB48 LQFP48 SC68C752BIBS SC68C752B_3 Product data sheet 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs Ordering information ...
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Philips Semiconductors 4. Block diagram SC68C752B DATA BUS R/W CONTROL RESET REGISTER SELECT CS IRQ INTERRUPT TXRDYA, TXRDYB CONTROL RXRDYA, RXRDYB Fig 1. Block diagram of SC68C752B SC68C752B_3 Product data sheet 5 V, 3.3 ...
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... Fig 2. Pin configuration for LQFP48 Fig 3. Pin configuration for HVQFN32 SC68C752B_3 Product data sheet 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs RXB 4 RXA 5 6 TXRDYB SC68C752BIB48 7 TXA TXB 8 OPB n.c. 12 terminal 1 index area D6 1 ...
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Philips Semiconductors 5.2 Pin description Table 2: Pin description Symbol Pin LQFP48 HVQFN32 CDA, CDB 40 CTSA, CTSB 38 ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin LQFP48 HVQFN32 R n.c. 12, 25, 29, 14 OPA, OPB 32, 9 22, 7 RESET 36 24 RIA, RIB 41 RTSA, RTSB 33, 22 23, ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin LQFP48 HVQFN32 V 19 XTAL1 13 10 XTAL2 14 11 Table SC68C752B_3 Product data sheet 5 V, 3.3 V and 2.5 V dual ...
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Philips Semiconductors 6. Functional description The UART will perform serial-to-parallel conversion on data characters received from peripheral devices or modems, and parallel-to-parallel conversion on data characters transmitted by the processor. The complete status of each channel of the SC68C752B UART ...
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Philips Semiconductors UART 1 RX FIFO FIFO Fig 4. Auto flow control (Auto-RTS and Auto-CTS) example 6.2.1 Auto-RTS Auto-RTS data flow control originates in the receiver block (see SC68C752B” on page levels used in Auto-RTS are ...
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Philips Semiconductors 6.2.2 Auto-CTS The transmitter circuitry checks CTS before sending the next data byte. When CTS is active, the transmitter sends the next byte. To stop the transmitter from sending the following byte, CTS must be de-asserted before the ...
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Philips Semiconductors There are two other enhanced features relating to software flow control: • Xon Any function (MCR[5]): Operation will resume after receiving any character after recognizing the Xoff character possible that an Xon1 character is recognized as ...
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Philips Semiconductors 6.3.3 Software flow control example Fig 7. Software flow control example 6.3.3.1 Assumptions UART1 is transmitting a large text file to UART2. Both UARTs are using software flow control with single character Xoff (0F) and Xon (0D) tokens. ...
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Philips Semiconductors 6.4 Reset Table 5 Table 5: Register Interrupt Enable Register Interrupt Identification Register FIFO Control Register Line Control Register Modem Control Register Line Status Register Modem Status Register Enhanced Feature Register Receiver Holding Register Transmitter Holding Register Transmission ...
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Philips Semiconductors 6.5 Interrupts The SC68C752B has interrupt generation and prioritization (six prioritized levels of interrupts) capability. The Interrupt Enable Register (IER) enables each of the six types of interrupts and the IRQ signal in response to an interrupt generation. ...
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Philips Semiconductors 6.5.1 Interrupt mode operation In Interrupt mode (if any bit of IER[3: the processor is informed of the status of the receiver and transmitter by an interrupt signal, IRQ. Therefore not necessary to continuously ...
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Philips Semiconductors 6.6 DMA operation There are two modes of DMA operation, DMA mode 0 or DMA mode 1, selected by FCR[3]. In DMA mode 0 or FIFO disable (FCR[ DMA occurs in single character transfers. In DMA ...
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Philips Semiconductors 6.6.2 Block DMA transfers (DMA mode 1) Figure 11 wrptr trigger wrptr Fig 11. TXRDY and RXRDY in DMA mode 1 6.6.2.1 Transmitter TXRDY is active when there is a trigger level number of spaces available. It becomes ...
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Philips Semiconductors 6.8 Break and time-out conditions An RX idle condition is detected when the receiver line, RX, has been HIGH for 4 character time. The receiver line is sampled midway through each bit. When a break condition occurs, the ...
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Philips Semiconductors Table 8: Desired baud rate 50 75 110 134.5 150 300 600 1200 1800 2000 2400 3600 4800 7200 9600 19200 38400 56000 Table 9: Desired baud rate 50 75 110 134.5 150 300 600 1200 1800 2000 ...
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Philips Semiconductors Fig 13. Crystal oscillator connections 7. Register descriptions Each register is selected using address lines A0, A1, A2, and in some cases, bits from other registers. The programming combinations for register selection are shown in Table 10. Table ...
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Philips Semiconductors Table 11 Table 11: SC68C752B internal registers Register Bit 7 [1] General register set RHR bit THR bit IER CTS interrupt [2] enable 0 ...
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Philips Semiconductors [4] Enhanced Feature Register; XON1/XON2 and XOFF1/XOFF2 are accessible only when LCR is set to ‘BFh’. Remark: Refer to the notes under 7.1 Receiver Holding Register (RHR) The receiver section consists of the Receiver Holding Register (RHR) and ...
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Philips Semiconductors 7.3 FIFO Control Register (FCR) This is a write-only register that is used for enabling the FIFOs, clearing the FIFOs, setting transmitter and receiver trigger levels, and selecting the type of DMA signalling. shows FIFO Control Register bit ...
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Philips Semiconductors 7.4 Line Control Register (LCR) This register controls the data communication format. The word length, number of stop bits, and parity type are selected by writing the appropriate bits to the LCR. shows the Line Control Register bit ...
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Philips Semiconductors 7.5 Line Status Register (LSR) Table 14 Table 14: Bit When the LSR is read, LSR[4:2] reflect the error bits (BI, FE, PE) of the character at the top of ...
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Philips Semiconductors Remark: The three error bits (parity, framing, break) may not be updated correctly in the first read of the LSR when the input clock (XTAL1) is running faster than 36 MHz. However, the second read is always correct. ...
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Philips Semiconductors 7.7 Modem Status Register (MSR) This 8-bit register provides information about the current state of the control lines from the mode, data set, or peripheral device to the processor. It also indicates when a control input from the ...
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Philips Semiconductors 7.8 Interrupt Enable Register (IER) The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver error, RHR interrupt, THR interrupt, Xoff received, or CTS/RTS change of state from LOW to HIGH. The IRQ output ...
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Philips Semiconductors 7.9 Interrupt Identification Register (IIR) The IIR is a read-only 8-bit register which provides the source of the interrupt in a prioritized manner. Table 18: Bit Symbol 7:6 IIR[7:6] 5 IIR[5] 4 IIR[4] 3:1 IIR[3:1] 0 IIR[0] The ...
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Philips Semiconductors 7.10 Enhanced Feature Register (EFR) This 8-bit register enables or disables the enhanced features of the UART. the Enhanced Feature Register bit settings. Table 20: Bit Symbol 7 EFR[7] 6 EFR[6] 5 EFR[5] 4 EFR[4] 3:0 EFR[3:0] Combinations ...
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Philips Semiconductors Remark: TCR can only be written to when EFR[ and MCR[ The programmer must program the TCR such that TCR[3:0] > TCR[7:4]. There is no built-in hardware check to make sure this condition is ...
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Philips Semiconductors 8. Programmer’s guide The base set of registers that is used during high-speed data transfer have a straightforward access method. The extended function registers require special access bits to be decoded along with the address lines. The following ...
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Philips Semiconductors Table 24: Command Set TX FIFO and RX FIFO thresholds to VALUE Read FIFO Rdy register Set prescaler value to divide-by-1 Set prescaler value to divide-by-4 [1] sign here means bit-AND. SC68C752B_3 Product data sheet 5 V, 3.3 ...
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Philips Semiconductors 9. Limiting values Table 25: In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol amb T stg [1] Stresses beyond those listed under These are stress ratings only, and ...
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Philips Semiconductors 10. Static characteristics Table 26: Static characteristics Tolerance Symbol Parameter Conditions V supply voltage CC V input voltage I V HIGH-level input IH voltage V LOW-level input IL voltage V output voltage ...
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Philips Semiconductors 11. Dynamic characteristics Table 27: Dynamic characteristics +85 C; tolerance of V amb Symbol Parameter t R/W to chip select d1 t read cycle delay d2 t delay from CS to data d3 ...
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Philips Semiconductors 11.1 Timing diagrams su1 R Fig 14. General read timing su1 R Fig 15. General write timing SC68C752B_3 ...
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Philips Semiconductors (1) CS (write) RTSA, RTSB change of state DTRA, DTRB CDA, CDB CTSA, CTSB DSRA, DSRB IRQ (2) CS (read) RIA, RIB (1) CS timing during a write cycle. See (2) CS timing during a read cycle. See ...
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Philips Semiconductors RXA, RXB IRQ CS (read) Fig 18. Receive timing RXA, RXB RXRDYA, RXRDYB CS (read) Fig 19. Receive ready timing in non-FIFO mode SC68C752B_3 Product data sheet 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s ...
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Philips Semiconductors RXA, RXB RXRDYA, RXRDYB CS (read) Fig 20. Receive ready timing in FIFO mode TXA, TXB IRQ active CS (write) Fig 21. Transmit timing SC68C752B_3 Product data sheet 5 V, 3.3 V and 2.5 V dual UART, 5 ...
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Philips Semiconductors TXA, TXB active CS (write byte #1 TXRDYA, TXRDYB Fig 22. Transmit ready timing in non-FIFO mode TXA, TXB CS (write) active byte #64 TXRDYA, TXRDYB Fig 23. Transmit ready timing in ...
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Philips Semiconductors 12. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...
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Philips Semiconductors HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 0.85 mm terminal 1 index area terminal 1 index area 32 DIMENSIONS (mm ...
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Philips Semiconductors 13. Soldering 13.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...
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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...
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Philips Semiconductors 15. Revision history Table 30: Revision history Document ID Release date SC68C752B_3 20051129 • Modifications: added HVQFN32 package option (affects “Ordering outline”) • Section 6.3.3.1 – 1st sentence: changed “RCV FIFO” to “RX FIFO” – 3rd sentence: changed ...
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Philips Semiconductors 16. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...