LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 90
LM3S328-IQC20-A0
Manufacturer Part Number
LM3S328-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S328-IQC20-A0.pdf
(371 pages)
- Current page: 90 of 371
- Download datasheet (3Mb)
System Control
a.
90
Bit/Field
If the unit is unclocked, reads or writes to the unit will generate a bus fault.
11:5
3:2
4
1
0
reserved
reserved
UART1
UART0
Name
SSI
Type
R/W
R/W
R/W
RO
RO
Reset
0
0
0
0
0
Preliminary
Description
Reserved bits return an indeterminate value, and should
never be changed.
This bit controls the clock gating for the SSI module. If set,
the unit receives a clock and functions. Otherwise, the unit
is unclocked and disabled.
Reserved bits return an indeterminate value, and should
never be changed.
This bit controls the clock gating for the UART1 module. If
set, the unit receives a clock and functions. Otherwise, the
unit is unclocked and disabled.
This bit controls the clock gating for the UART0 module. If
set, the unit receives a clock and functions. Otherwise, the
unit is unclocked and disabled.
a
a
a
April 27, 2007
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