SAA-XC866-1FRA INFINEON [Infineon Technologies AG], SAA-XC866-1FRA Datasheet - Page 87
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SAA-XC866-1FRA
Manufacturer Part Number
SAA-XC866-1FRA
Description
8-Bit Single-Chip Microcontroller
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.SAA-XC866-1FRA.pdf
(114 pages)
- Current page: 87 of 114
- Download datasheet (3Mb)
For module clock f
shown in
Table 30
Module Clock f
26.7 MHz
As f
26.7 MHz. During slow-down mode where f
etc., CTC can be set to 00
10 MHz. However, it is important to note that the conversion error could increase due to
loss of charges on the capacitors, if f
3.18.2
The analog-to-digital conversion procedure consists of the following phases:
• Synchronization phase (t
• Sample phase (t
• Conversion phase
• Write result phase (t
Figure 34
Data Sheet
SAMPLE Bit
BUSY Bit
ADCI
f
ADCI
cannot exceed 10 MHz, bit field CTC should not be set to 00
Table
ADC Conversion Sequence
conversion start
trigger
f
ADC Conversion Timing
ADCI
30.
ADC
t
SYN
ADC
S
Frequency Selection
)
Sample Phase
= 26.7 MHz, the analog clock f
WR
CTC
00
01
10
11
)
B
B
B
B
t
B
S
SYN
(default)
as long as the divided analog clock f
)
t
CONV
ADC
Conversion Phase
becomes too low during slow-down mode.
84
ADC
Prescaling Ratio
÷ 2
÷ 3
÷ 4
÷ 32
may be reduced to 13.3 MHz, 6.7 MHz
ADCI
interrupt
Source
frequency can be selected as
Write Result Phase
Functional Description
Analog Clock f
13.3 MHz (N.A)
8.9 MHz
6.7 MHz
833.3 kHz
ADCI
t
WR
Channel
interrupt
does not exceed
B
SAA-XC866
when f
V1.5, 2010-09
interrupt
Result
ADCI
ADC
is
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