STR91XFA STMICROELECTRONICS [STMicroelectronics], STR91XFA Datasheet - Page 68
STR91XFA
Manufacturer Part Number
STR91XFA
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STR91XFA.pdf
(78 pages)
- Current page: 68 of 78
- Download datasheet (2Mb)
Electrical characteristics
6.15.4 I
Notes: 1 The device must internally provide a hold time of at least 300 ns for the SDA signal in order to
68/78
2 The maximum hold time of the START condition has only to be met if the interface does not
3 C
V
Table 32.
bridge the undefined region of the falling edge of SCL
stretch the low period of SCL signal
2
t
t
t
t
t
t
t
t
t
t
C
BUF
HD:STA
LOW
HIGH
SU:STA
HD:DAT
SU:DAT
R
F
SU:STO
DDQ
b
C electrical characteristics
b
Symbol
= total capacitance of one bus line in pF
= 2.7 - 3.6V, V
I
Bus free time between a STOP
and START condition
Hold time START condition.
After this period, the first clock
pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated
START condition
Data hold time
Data set-up time
Rise time of both SDA and SCL
signals
Fall time of both SDA and SCL
signals
Set-up time for STOP condition
Capacitive load for each bus
line
2
C Electrical Characteristics
DD
Parameter
= 1.65 - 2V, T
A
= -40 / 85 °C unless otherwise specified.
Min
250
4.7
4.0
4.7
4.0
4.7
4.0
Standard I
0
1000
Max
300
400
2
C
20+0.1C
20+0.1C
Min
100
1.3
0.6
1.3
0.6
0.6
0.6
0
Fast I
b
b
2
C
Max
300
300
400
STR91xFA
Unit
ms
pF
µs
µs
µs
µs
ns
ns
ns
ns
µs
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