LPC2919 PHILIPS [NXP Semiconductors], LPC2919 Datasheet - Page 36

• Manufacturer Part Number: LPC2919
• Description: ARM9 microcontroller with CAN and LIN
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
LPC2917_19_1
Preliminary data sheet
Fig 9. ADC block diagram
VPB
system
bus
ADC
IRQ
VPB SubSystem
domain
8.7.5.3 ADC pin description
(MSCSS SubSystem clock)
Start 0
CLK_ADCx_VPB
registers
control
ADC
&
The ADC clock is limited to 4.5 MHz maximum frequency and should always be lower
than or equal to the system clock frequency. To meet this constraint or to select the
desired lower sampling frequency the clock generation unit provides a programmable
fractional system-clock divider dedicated to the ADC clock. Conversion rate is determined
by the ADC clock frequency divided by the number of resolution bits plus one. Accessing
ADC registers requires an enabled ADC clock, which is controllable via the clock
generation unit, see
Each ADC has four start inputs. Note that start 0 and start 2 are captured in the system
clock domain while start 1 and start 3 are captured in the ADC domain. The start inputs
are connected at MSCSS level, see
The two ADC modules in the MSCSS have the pins described below. The ADCx input
pins are combined with other functions on the port pins of the LPC2917/19. The VREFN
and VREFP pins are common for both ADCs.
Table 20.
Symbol
ADCn IN[7:0]
ADCn_EXT_START
VREFN
VREFP
Start 2
Conversion data
Analog to digital converter pins
Config data
update
IRQ
Rev. 1.01 — 15 November 2007
Section
Direction
in
in
in
in
8.8.4.
Start 1
analog input for ADCn, channel 7 to channel 0 (n is 1 or 2)
ADC HIGH reference level
Description
ADC external start-trigger input (n is 1 or 2)
ADC LOW reference level
(upto 4.5 MHz)
(ADC clock)
CLK_ADCx
Section 8.7.2.1
registers
control
ADC
&
Start 3
Table 20
ARM9 microcontroller with CAN and LIN
for details.
convertor
Sync_out
Analog
Digital
3.3 V
shows the ADC pins.
to
ADC domain
LPC2917/19
Analog
mux
© NXP B.V. 2007. All rights reserved.
001aad331 **
Analog
inputs
ADC1: 8
ADC2: 8
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