LPC2880FET180 PHILIPS [NXP Semiconductors], LPC2880FET180 Datasheet - Page 9

• Manufacturer Part Number: LPC2880FET180
• Description: 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 4.
LPC2880_LPC2888_1
Preliminary data sheet
Signal name
A15/P0[31]
A16/P1[0]
A17/P1[1]
A18/P1[2]
A19/P1[3]
A20/P1[4]
BLS0/P1[12]
BLS1/P1[13]
CAS/P1[16]
CKE/P1[9]
DQM0/P1[10]
DQM1/P1[11]
DYCS/P1[8]
MCLKO/P1[14]
OE/P1[18]
RAS/P1[17]
RPO/P1[19]
STCS0/P1[5]
STCS1/P1[5]
STCS2/P1[5]
WE/P1[15]
GPIO and mode control
MODE1/P2[2]
MODE2/P2[3]
P2[0]
P2[1]
I
SCL
SDA
JTAG interface
JTAG_SEL
JTAG_TCK
JTAG_TDI
JTAG_TMS
JTAG_TRST
JTAG_TDO
2
C-bus interface
Pin description
Ball #
A14
B14
C14
A13
B13
C13
A12
B12
C10
B10
C12
A11
B9
A10
A17
A9
B1
C9
A8
B11
C11
K18
J16
K16
K17
H16
J17
U4
V4
T5
U12
T13
U13
…continued
Type
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FO
FI
FI
FI
FI
I/O
I/O
I
I
I
I
I
O
[1]
Description
address bus for static memory; GPIO pins
byte lane select for D[7:0], active LOW for static memory; GPIO pin
byte lane select for D[15:8], active LOW for static memory; GPIO pin
column address strobe, active LOW for SDRAM; GPIO pin
clock enable; active HIGH for SDRAM; GPIO pin
data mask output for D[7:0], active HIGH for SDRAM; GPIO pin
data mask output for D[15:8], active HIGH for SDRAM; GPIO pin
chip select, active LOW for SDRAM; GPIO pin
clock for SDRAM and SyncFlash memory; GPIO pin
output enable, active LOW for static memory; GPIO pin
row address strobe, active LOW for SDRAM; GPIO pin
reset power down, active LOW for SyncFlash memory; GPIO pin
chip select, active LOW for static memory bank 0; GPIO pin
chip select, active LOW for static memory bank 1; GPIO pin
chip select, active LOW for static memory bank 2; GPIO pin
write enable, active LOW for SDRAM and static memory; GPIO pin
start up MODE PIN1 (pull down); 5 V tolerant GPIO pin
start up MODE PIN2 (pull down); 5 V tolerant GPIO pin
5 V tolerant GPIO pin
5 V tolerant GPIO pin
serial clock (input/open-drain output); 5 V tolerant pin
serial data (input/open-drain output); 5 V tolerant pin
JTAG selection (pull-down); 5 V tolerant pin
JTAG reset input (pull-down); 5 V tolerant pin
JTAG data input (pull-up); 5 V tolerant pin
JTAG mode select input (pull-up); 5 V tolerant pin
JTAG reset input (pull-down); 5 V tolerant pin
JTAG data output; 5 V tolerant pin
16/32-bit ARM microcontrollers with external memory interface
Rev. 01 — 22 June 2006
LPC2880; LPC2888
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
9 of 34