LPC2880FET180 PHILIPS [NXP Semiconductors], LPC2880FET180 Datasheet - Page 23

• Manufacturer Part Number: LPC2880FET180
• Description: 16/32-bit ARM microcontrollers; 8 kB cache, up to 1 MB flash, Hi-Speed USB 2.0 device, and SDRAM memory interface
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
LPC2880_LPC2888_1
Preliminary data sheet
6.20.1 Features
6.20.2 Reset
6.20.3 Crystal oscillator
6.20 Clocking and power control
Clocking in the LPC2880/LPC2888 is controlled by a versatile Clock Generation Unit
(CGU), so that system and peripheral requirements may be met, while allowing
optimization of power consumption. Clocks to most functions may be turned off if not
needed, and may be enabled and disabled by selected events through the Event Router.
Clock sources include a high frequency (1 MHz to 20 MHz) crystal oscillator and a 32 kHz
RTC oscillator. Higher frequency clocks may be generated through the use of two
programmable PLLs.
Reset of individual functional blocks is also controlled by the CGU. Full chip reset can be
initiated by the external reset pin or by the watchdog timer.
The LPC2880/LPC2888 has two sources of reset: the RESET_N pin and the watchdog
reset. The RESET pin includes an on-chip pull-up. The RESET_N pin must remain
asserted at power-up for 1 ms after power supply voltages are stable. This includes
on-chip DC-to-DC converter voltages.
When a chip reset is removed, the processor begins executing at address 0, which is the
Reset vector. At that point, all of the processor and peripheral registers have been
initialized to predetermined values.
The on-chip watchdog timer can cause a chip reset if not updated within a user
programmable amount of time. A status register allows software to determine if a chip
reset was caused by the watchdog timer. The watchdog timer can also be configured to
generate an interrupt if desired.
Software reset of many individual functional blocks may be performed via registers within
the CGU.
The main oscillator is the basis for the clocks most chip functions use by default. The
oscillator may be used with crystal frequencies from 1 MHz to 20 MHz.
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Supports polling the busy flag from the LCD controller to avoid CPU polling.
Contains a 16 B FIFO for sending control and data information to the LCD controller.
Contains a serial interface which uses the same FIFO for serial transmissions.
Supports FIFO level flow control to the General Purpose DMA controller.
Power and performance control provided by versatile clock generation to individual
functional blocks.
Multiple clock sources including external crystal and programmable PLLs.
Watchdog timer to monitor software integrity.
Individual control of software reset to many functional blocks.
Lower speed peripherals are connected to an APB bus for lower power consumption.
16/32-bit ARM microcontrollers with external memory interface
Rev. 01 — 22 June 2006
LPC2880; LPC2888
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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