LPC2292FBD144/01 NXP [NXP Semiconductors], LPC2292FBD144/01 Datasheet - Page 28

• Manufacturer Part Number: LPC2292FBD144/01
• Description: 16/32-bit ARM microcontrollers; 256 kB ISP/IAP flash with CAN, 10-bit ADC and external memory interface
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
LPC2292_2294_7
Product data sheet
6.20.2 Embedded trace
6.20.3 RealMonitor
communication channel allows the JTAG port to be used for sending and receiving data
without affecting the normal program flow. The debug communication channel data and
control registers are mapped in to addresses in the EmbeddedICE logic.
The JTAG clock (TCK) must be slower than
interface to operate.
Since the LPC2292/LPC2294 have significant amounts of on-chip memory, it is not
possible to determine how the processor core is operating simply by observing the
external pins. The Embedded Trace Macrocell (ETM) provides real-time trace capability
for deeply embedded processor cores. It outputs information about processor execution to
the trace port.
The ETM is connected directly to the ARM core and not to the main AMBA system bus. It
compresses the trace information and exports it through a narrow trace port. An external
trace port analyzer must capture the trace information under software debugger control.
Instruction trace (or PC trace) shows the flow of execution of the processor and provides a
list of all the instructions that were executed. Instruction trace is significantly compressed
by only broadcasting branch addresses as well as a set of status signals that indicate the
pipeline status on a cycle by cycle basis. Trace information generation can be controlled
by selecting the trigger resource. Trigger resources include address comparators,
counters and sequencers. Since trace information is compressed the software debugger
requires a static image of the code being executed. Self-modifying code cannot be traced
because of this restriction.
RealMonitor is a configurable software module, developed by ARM Inc., which enables
real-time debug. It is a lightweight debug monitor that runs in the background while users
debug their foreground application. It communicates with the host using the Debug
Communications Channel (DCC), which is present in the EmbeddedICE logic. The
LPC2292/LPC2294 contain a specific configuration of RealMonitor software programmed
into the on-chip flash memory.
Rev. 7 — 4 December 2008
16/32-bit ARM microcontrollers with external memory interface
1
6
of the CPU clock (CCLK) for the JTAG
LPC2292/LPC2294
© NXP B.V. 2008. All rights reserved.
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