LM96080CIMT-NOPB1 NSC [National Semiconductor], LM96080CIMT-NOPB1 Datasheet - Page 13

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LM96080CIMT-NOPB1

Manufacturer Part Number
LM96080CIMT-NOPB1
Description
System Hardware Monitor with 2-Wire Serial Interface
Manufacturer
NSC [National Semiconductor]
Datasheet
The Serial Bus control lines include the SDA (serial data),
SCL (serial clock), and A0-A2 (address) pins. The LM96080
can only operate as a slave. The SCL line only controls the
serial interface, all other clock functions within LM96080 such
as the ADC and fan counters are done with a separate asyn-
chronous internal clock.
When using the Serial Bus Interface, a write will always con-
sists of the LM96080 Serial Bus Interface Address byte, fol-
lowed by the Internal Address Register byte, then the data
byte.
There are two cases for a read:
1.
If the Internal Address Register is known to be at the
desired Address, simply read the LM96080 with the
Serial Bus Interface Address byte, followed by the data
byte read from the LM96080.
13
2.
The default power on Serial Bus address for the LM96080 is
0101(A2)(A1)(A0) binary, where A0-A2 are the Serial Bus
Address.
All of the combinations of communications supported by the
LM96080 are depicted in the Serial Bus Interface Timing Di-
agrams as shown in
If the Internal Address Register value is unknown, write
to the LM96080 with the Serial Bus Interface Address
byte, followed by the Internal Address Register byte.
Then restart the Serial Communication with a Read
consisting of the Serial Bus Interface Address byte,
followed by the data byte read from the LM96080.
Figure
2.
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