SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 34

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SE97

Manufacturer Part Number
SE97
Description
DDR memory module temp sensor with integrated SPD, 3.3 V
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
9. Application design-in information
SE97_5
Product data sheet
Fig 23. SE97 interfacing with 1.1 V host controller
0.1 F
A2
A0
A1
In a typical application, the SE97 behaves as a slave device and interfaces to a bus
master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host,
and asserts when the temperature reading exceeds the programmed values in the alarm
registers. The A0, A1 and A2 pins are directly connected to V
resistors. The SDA and SCL serial interface pins are open-drain I/Os that require pull-up
resistors, and are able to sink a maximum of 3 mA with a voltage drop less than 0.4 V.
Typical pull-up values for SCL and SDA are 10 k , but the resistor values can be changed
in order to meet the rise time requirement if the capacitance load is too large due to
routing, connectors, or multiple components sharing the same bus.
Fig 22. Typical application showing SE97 interfacing with 3.3 V host
SE97
V
V
DD
SS
EVENT
3.3 V
SDA
SCL
10 k
10 k
slave
Rev. 05 — 6 August 2009
A2
A0
A1
DDR memory module temp sensor with integrated SPD, 3.3 V
mother board
SE97
V
V
DD
SS
0.1 F
B2
B1
V
CC(B)
PCA9509
3.3 V
V
CC(A)
EVENT
EN
A2
A1
SDA
SCL
10 k
(3 )
10 k
10 k
master
EVENT
CONTROLLER
DD
SDA
SCL
HOST
or V
0.1 F
CONTROLLER
002aab354
SS
1.1 V
HOST
without any pull-up
© NXP B.V. 2009. All rights reserved.
002aad262
SE97
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