VND5050J-E13TR STMICROELECTRONICS [STMicroelectronics], VND5050J-E13TR Datasheet

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VND5050J-E13TR

Manufacturer Part Number
VND5050J-E13TR
Description
Double channel high side driver with analog current sense for automotive applications
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
General
(*) Typical value with all loads connected
Application
Main
Diagnostic Functions
Protections
Order codes
March 2006
Max supply voltage
Operating voltage range
Max On-State resistance (per ch.)
Current limitation (typ)
Off state supply current
All types of resistive, inductive and capacitive
loads
Inrush current active management by power
limitation
Very low stand-by current
3.0V CMOS compatible input
Optimized electromagnetic emission
Very low electromagnetic susceptibility
In compliance with the 2002/95/ec european
directive
Open drain status output
On state open load detection
Off state open load detection
Thermal shutdown indication
Undervoltage shut-down
Overvoltage clamp
Output stuck to V
Load current limitation
PowerSSO-12
PowerSSO-24
Package
Double channel high side driver with analog current sense
CC
detection
I
R
V
V
LIMH
I
CC
CC
ON
S
4.5 to 36V
50 mΩ
2 µA
19 A
41V
Part number (Tube)
(*)
VND5050K-E
VND5050J-E
Rev 1
Description
The VND5050K-E and VND5050J-E is a
monolithic device made using STMicroelectronics
VIPower M0-5 technology. It is intended for driving
resistive or inductive loads with one side
connected to ground. Active V
clamp protects the device against low energy
spikes (see ISO7637 transient compatibility
table). The device detects open load condition
both in on and off state, when STAT_DIS is left
open or driven low. Output shorted to V
detected in the off state.
When STAT_DIS is driven high, STATUS pin is in
high impedance state.
Output current limitation protects the device in
overload condition. In case of long overload
duration, the device limits the dissipated power to
safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears..
Self limiting of fast thermal transients
Protection against loss of ground and loss of
V
Thermal shut down
Reverse battery protection (see
Electrostatic discharge protection
CC
for automotive applications
PowerSSO-12
Part number (Tape & Reel)
VND5050K-E
VND5050J-E
VND5050K-E13TR
VND5050J-E13TR
PowerSSO-24
CC
pin voltage
Figure
CC
www.st.com
28)
is
1/28
28

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VND5050J-E13TR Summary of contents

Page 1

... Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears.. Part number (Tube) VND5050J-E VND5050K-E Rev 1 VND5050J-E VND5050K-E for automotive applications PowerSSO-12 PowerSSO-24 Figure pin voltage CC Part number (Tape & Reel) VND5050J-E13TR VND5050K-E13TR 28 1/28 www.st.com 28 ...

Page 2

... GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 3.1.1 3.1.2 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 µC I/Os protection 3.4 Open load detection in off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 Package Mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2/28 Solution Solution VND5050J-E / VND5050K-E ...

Page 3

... VND5050J-E / VND5050K-E 1 Block diagram and pin description Figure 1. Block Diagram V GND CLAMP INPUT1 STATUS1 STAT_DIS INPUT2 OVERTEMP. 1 STATUS2 Table 1. Pin Function Name V Battery connection CC OUTPUTn Power output GND Ground connection. Must be reverse battery protected by an external diode/resistor network INPUTn Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state ...

Page 4

... I SD STAT_DIS OUTPUTn INn INPUTn STATUSn V INn GND I GND - V during reverse battery condition OUTn CCn Parameter =0Ω; V =13.5V; T =150º bat jstart VND5050J-E / VND5050K OUTn V OUTn I STATn V STATn Value 41 0.3 200 Internally Limited (Typ ...

Page 5

... VND5050J-E / VND5050K-E 2.2 Thermal Data Table 3. Thermal Data Symbol Parameter Thermal resistance junction-case (Max.) R thj-case (with one channel ON) R Thermal resistance junction-ambient (Max.) thj-amb 2.3 Electrical Characteristics 8V<V <36V; -40°C<T CC Table 4. Power section Symbol Parameter V Operating supply voltage CC V Undervoltage shutdown USD Undervoltage shut-down ...

Page 6

... CC T <T < TSD - TSD T >T (see Figure 4) j TSD I =2A; V =0; L=6mH OUT IN I =0.1A -40°C...+150°C OUT j (see Figure 6) VND5050J-E / VND5050K-E Min. Typ. Max. Unit 0.21 mJ 0.28 mJ Min Typ Max Unit 0.5 V µA 10 100 pF 5 -0.7 V Min. Typ. Max. Unit 12 18 ...

Page 7

... VND5050J-E / VND5050K-E Table 8. Openload Detection Symbol Parameter Openload ON State I OL Detection Threshold Openload ON State t DOL(on) Detection Delay Delay between INPUT falling t edge and STATUS rising POL edge in Openload condition Openload OFF State Voltage V OL Detection Threshold Output Short Circuit DSTKON Detection Delay at Turn Off Table 9 ...

Page 8

... I OUT OL V > V OUT OL t DSTKON INPUT VND5050J-E / VND5050K-E OPEN LOAD STATUS TIMING (with external pull-up) I < OUT STAT t DOL(on) OVER TEMP STATUS TIMING T > TSD STAT t SDL OUTPUT ...

Page 9

... VND5050J-E / VND5050K-E Figure 5. Switching characteristics V Figure 6. Output Voltage Drop Limitation OUT 80% dV /dt OUT (on) 10 INPUT t d(on out T =150 on(T) Electrical specifications 90% dV /dt OUT (off d(off = =- out t t 9/28 ...

Page 10

... TEST LEVEL RESULTS III CONTENTS VND5050J-E / VND5050K-E Delays and time Impedance 2 ms, 10 Ω µs, 2 Ω 0.1 µs, 50 Ω 100 ms 0.1 µs, 50 Ω 100 ms 100 ms, 0.01 Ω 400 ms, 2 Ω ...

Page 11

... VND5050J-E / VND5050K-E Figure 7. Waveforms INPUT STAT_DIS LOAD CURRENT STATUS V CC INPUT STAT_DIS LOAD CURRENT STATUS INPUT STAT_DIS LOAD VOLTAGE STATUS INPUT STAT_DIS LOAD VOLTAGE LOAD CURRENT STATUS INPUT STAT_DIS LOAD VOLTAGE STATUS T j INPUT STAT_DIS LOAD CURRENT STATUS NORMAL OPERATION UNDERVOLTAGE ...

Page 12

... Figure 13. Input Hysteresis Voltage Vihyst (V) 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 100 125 150 175 -50 VND5050J-E / VND5050K-E High Level Input Current Vin=2.1V - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) - 100 125 150 Tc (° ...

Page 13

... VND5050J-E / VND5050K-E Figure 14. Status Low Output Voltage Vstat (V) 0.9 0.8 Istat=1.6mA 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 - (°C) Figure 16. Status Leakage Current Ilstat (uA) 0.055 0.05 Vstat=5V 0.045 0.04 0.035 0.03 0.025 -50 - (°C) Figure 18. Status Clamp Voltage Vscl (V) 9 8.5 Istat=1mA 8 7.5 7 6.5 6 5.5 5 4.5 4 -50 - (° ...

Page 14

... Figure 25. STAT_DIS Clamp Voltage Vsdcl( 100 125 150 175 -50 VND5050J-E / VND5050K LIM case Vcc=13V - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) Isd=1mA - ...

Page 15

... VND5050J-E / VND5050K-E Figure 26. High Level STAT_DIS Voltage Vsdh( -50 - (°C) Figure 27. Low Level STAT_DIS Voltage Vsdl( 100 125 150 175 -50 Electrical specifications - 100 125 150 Tc (°C) 175 15/28 ...

Page 16

... This can be used with any type of load. GND ). S(on)max ) / (-I ) GND (when V <0: during reverse battery situations) is: GND the input thresholds and the status output S(on)max GND . GND VND5050J-E / VND5050K OUTPUT GND R GND D GND resistor. GND becomes the sum of the S(on)max D ld ...

Page 17

... VND5050J-E / VND5050K-E If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: A diode ( the ground line. GND A resistor (R =1kΩ) should be inserted in parallel to D GND inductive load. ...

Page 18

... The values of V OLmin section. Figure 29. Open Load detection in off state 18/28 out , V and I are available in the Electrical Characteristics OLmax L(off2) V batt DRIVER INPUT + LOGIC + R - STATUS V OL GROUND VND5050J-E / VND5050K-E is pulled high (up to several mA), the pull L(off2) OUT R L ...

Page 19

... VND5050J-E / VND5050K-E 4 Package and PCB thermal data 4.1 PowerSSO-12 thermal data Figure 30. PowerSSO-12 PC Board Layout condition of R PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm Figure 31. R thj-amb Figure 32. PowerSSO-12 Thermal Impedance Junction Ambient Single Pulse Pulse Calculation Formula ⋅ ...

Page 20

... Package and PCB thermal data Figure 33. Thermal Fitting Model of a Double Channel HSD in PowerSSO-12 Thermal Parameter Area/island (cm R1=R7 (°C/W) R2=R8 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1=C7 (W.s/°C) C2=C8 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 20/ Footprint 0.7 2 0.001 0.0025 0.05 0.2 0.27 3 VND5050J-E / VND5050K 0.1 0.1 0 ...

Page 21

... VND5050J-E / VND5050K-E 4.2 PowerSSO-24 thermal data Figure 34. PowerSSO-24 PC Board Layout condition of R PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm Figure 35. R thj-amb Figure 36. PowerSSO-24 Thermal Impedance Junction Ambient Single Pulse Pulse Calculation Formula ⋅ ...

Page 22

... Package and PCB thermal data Figure 37. Thermal Fitting Model of a Single Channel HSD in PowerSSO-12 Thermal Parameter Area/island (cm R1=R7 (°C/W) R2=R8 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1=C7 (W.s/°C) C2=C8 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 22/ Footprint 0 7 0.001 0.0022 0.025 0.75 1 2.2 VND5050J-E / VND5050K ...

Page 23

... VND5050J-E / VND5050K-E 5 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ...

Page 24

... Package information Figure 39. PowerSSO-24™ Package Dimensions PowerSSO-24™ Mechanical Data Table 13. Symbol 24/28 millimeters Min Typ 2.15 2.15 0 0.33 0.23 10.10 7.4 0.8 8.8 10.1 0.55 4.1 6.5 VND5050J-E / VND5050K-E Max 2.47 2.40 0.075 0.51 0.32 10.50 7.6 0.1 0.06 10.5 0.4 0.85 10deg 4.7 7.1 ...

Page 25

... VND5050J-E / VND5050K-E 5.2 Packing information Figure 40. PowerSSO-12 Tube Shipment (No Suffix) A Figure 41. PowerSSO-12 Tape And Reel Shipment (Suffix “TR”) TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width W Tape Hole Spacing P0 (± 0.1) Component Spacing P Hole Diameter D (± 0.05) ...

Page 26

... All dimensions are in mm. 26/28 Base Q.ty Bulk Q.ty Tube length (± 0. (± 0.1) All dimensions are in mm 1.55 1.5 11.5 2.85 2 End Top No components cover 500mm min tape VND5050J-E / VND5050K-E 49 1225 532 3.5 13.8 0.6 REEL DIMENSIONS Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± -0) 24.4 N (min) ...

Page 27

... VND5050J-E / VND5050K-E 6 Revision history Table 14. Document revision history Date 30-Mar-2006 Revision 1 Initial release. Revision history Changes 27/28 ...

Page 28

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 28/28 Please Read Carefully: © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com VND5050J-E / VND5050K-E ...

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