L6382D_07 STMICROELECTRONICS [STMicroelectronics], L6382D_07 Datasheet - Page 4

• Manufacturer Part Number: L6382D_07
• Description: Power management unit for microcontrolled ballast
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Pin settings
2
2.1
2.2
4/22
Pin settings
Pin connection
Figure 3.
Pin description
Table 1. Pin description
Name
1
2
3
4
5
6
7
8
Pin N°
Pin connection (top view)
GND
PFG
N.C.
TPR
HSI
HEI
PFI
LSI
Digital input signal to control the PFC gate driver. This pin has to be connected
to a TTL compatible signal.
Digital input signal to control the half-bridge low side driver. This pin has to be
connected to a TTL compatible signal.
Digital input signal to control the half-bridge high side driver. This pin has to be
connected to a TTL compatible signal.
Digital input signal to control the HEG output. This pin has to be connected to a
TTL compatible signal.
PFC Driver Output. This pin is intended to be connected to the PFC power
MOSFET gate. A resistor connected between this pin and the power MOS gate
can be used to reduce the peak current. An internal 10KΩ resistor toward
ground avoids spurious and undesired MOSFET turn-on. The totem pole
output stage is able to drive the power MOS with a peak current of 120mA
source and 250mA sink.
Not connected
Input for two point regulator; by coupling the pin with a capacitor to a switching
circuit, it is possible to implement a charge circuit for the Vcc.
Chip ground. Current return for both the low-side gate-drive currents and the
bias current of the IC. All of the ground connections of the bias components
should be tied to a trace going to this pin and kept separate from any pulsed
current return.
GND
GND
VCC
VCC
PFG
PFG
N.C.
N.C.
TPR
TPR
LSG
LSG
HSI
HSI
HEI
HEI
PFI
PFI
LSI
LSI
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
Description
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
VREF
VREF
CSI
CSI
CSO
CSO
HEG
HEG
N.C.
N.C.
HVSU
HVSU
N.C.
N.C.
OUT
OUT
HSG
HSG
BOOT
BOOT
L6382D