LM5069_10 NSC [National Semiconductor], LM5069_10 Datasheet - Page 6

• Manufacturer Part Number: LM5069_10
• Description: Output Voltage Clamping Using the LM5069 Hot Swap Controller
• Manufacturer: NSC [National Semiconductor]

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Power Dissipation in Q1
Implementing this voltage clamp requires re-evaluating the
possible power dissipation in Q1. During an over-voltage con-
dition where V
due to the voltage difference across Q1 (V
load current. The different scenarios which can result are:
power limit allowed by the LM5069 (set by R
or the duration of the over-voltage condition is known to be
less than the fault timeout set by C
occur. The appropriate limit line in the MOSFET’s SOA chart
can be used to determine the maximum power limit setting.
tion is extended (possibly lasting several seconds) rather than
brief, and the power dissipation in Q1 is less than the maxi-
mum power limit allowed by the LM5069, a fault timeout does
not occur. However, in this case Q1 can dissipate significant
power for the extended time. The DC limit line of the
MOSFET’s SOA chart must be checked, and the heat sink
provided for Q1 must be reviewed.
limit allowed by the LM5069, the fault timer is activated. If the
duration of the over-voltage condition is less than the
LM5069’s fault timeout period (set by C
to normal operation (V
dition subsides. But if the duration of the over-voltage condi-
tion is longer than the fault timeout period, Q1 is shut off at
the end of the fault timeout period.
- If the power dissipation in Q1 is less than the maximum
- In the case where the duration of the over-voltage condi-
- If the power dissipation in Q1 reaches the maximum power
OUT
is clamped, the power dissipated by Q1 is
OUT
= V
IN
) when the over-voltage con-
T
, a fault timeout does not
T
), the circuit returns
IN
PWR
– V
and R
OUT
), and the
S
), and/
6
Diode Selection
As mentioned above, the selection of a diode for Z1 should
be determined experimentally. The voltage at which V
clamped during an over-voltage condition depends not only
on Z1 and its tolerances, but also on Q1’s V
the load current, and Q1’s junction temperature. As for the
power rating required for Z1, the current which flows through
Z1 is the current supplied from the GATE pin of the LM5069,
which is nominally 16 µA. This current flows through Z1 only
when it is actively clamping the LM5069’s GATE pin.
Change the OVLO Threshold
When implementing this output voltage clamp, the OVLO
threshold must either be disabled, or set higher than the max-
imum voltage expected at V
voltage condition. Otherwise, Q1 is shut off anytime the
voltage at V
OVLO function connect the OVLO pin to Ground. To change
the OVLO threshold, see the LM5069 datasheet for the pro-
cedure to calculate new values for the external resistors.
PGD Output
When V
voltage difference exists across Q1 (V
difference exceeds 2.5V the PGD output switches low. When
the over-voltage condition subsides, and the voltage across
Q1 decreases below 1.25V, Q1 switches high.
OUT
IN
is clamped during an over-voltage condition, a
exceeds the OVLO threshold. To disable the
IN
during the transient or over-
IN
- V
OUT
GS
characteristics,
). If that voltage
OUT
is