STM804 STMICROELECTRONICS [STMicroelectronics], STM804 Datasheet - Page 6

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STM804

Manufacturer Part Number
STM804
Description
3V Supervisor with Battery Switchover
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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STM690/704/795/802/804/805/806
Pin Descriptions
MR. A logic low on /MR asserts the reset output.
Reset remains asserted as long as MR is low and
for t
has an internal pull-up. It can be driven from a TTL
or CMOS logic line, or shorted to ground with a
switch. Leave open if unused.
WDI. If WDI remains high or low for 1.6sec, the in-
ternal watchdog timer runs out and reset is trig-
gered. The internal watchdog timer clears while
reset is asserted or when WDI sees a rising or fall-
ing edge.
The watchdog function cannot be disabled by al-
lowing the WDI pin to float.
RST. Pulses low for t
low whenever V
when MR is a logic low. It remains low for t
either V
watchdog triggers a reset, or MR goes from low to
high.
RST (Open Drain). Pulses high for t
gered, and stays high whenever V
reset threshold or when MR is a logic high. It re-
mains high for t
reset threshold, the watchdog triggers a reset, or
MR goes from high to low.
Table 3. Pin Description
6/31
STM795
rec
7
1
2
3
4
5
6
8
after MR returns high. This active-low input
CC
rises above the reset threshold, the
STM690
STM802
rec
6
7
4
5
1
2
3
8
CC
after either V
is below the reset threshold or
Pin
rec
STM704
STM806
when triggered, and stays
6
7
4
5
1
2
3
8
CC
STM804
STM805
CC
falls below the
rec
6
7
4
5
1
2
3
8
is above the
when trig-
rec
Vccsw V
Name
E
V
V
PFO
after
WDI
RST
RST
V
V
MR
PFI
OUT
CON
BAT
E
CC
SS
Push-button Reset Input
Watchdog Input
Active-Low Reset Output
Active-High Reset Output
PFI Power-fail Input
PFO Power-fail Output
Supply Output for External LPSRAM
Supply Voltage
Ground
Chip Enable Input
Conditioned Chip Enable Output
Backup-Battery Input
CC
PFI. When PFI is less than V
below V
remains high. Connect to ground if unused.
PFO. When PFI is less than V
low V
high. Leave open if unused.
V
(V
channel MOSFET switch. When V
V
battery is used.
Vccsw. When V
high. When V
low. It can be used to drive gate of external PMOS
transistor for I
E. The input to the chip-enable gating circuit. Con-
nect to ground if unused.
E
set is not asserted. If E
serted, E
goes high, whichever occurs first. In the disabled
mode, E
V
from V
hysteresis, V
ceed V
OUT
SO
CON
BAT
Switch Output
SO
, V
), V
. When V
. When V
SW
. E
BAT
CC
CC
SW
, PFO goes low; otherwise, PFO remains
CON
OUT
CON
CON
. Connect to V
to V
connects to V
(2.4V), PFO goes low; otherwise, PFO
OUT
is pulled up to V
goes low only when E is low and re-
OUT
is connected to V
OUT
will remain low for 15µs or until E
BAT
CC
CC
OUT
reconnects to V
. When V
switches back to V
requirements exceeding 75mA.
is above the switchover voltage
falls below V
Function
switches to battery, Vccsw is
CON
CC
OUT
is low when reset is as-
if no battery is used.
CC
. Connect to V
PFI
OUT
PFI
rises above V
SO
or when V
CC
CC
.
, or V
, V
. V
CC
through a P-
OUT
CC
BAT
CC
falls below
, Vccsw is
switches
falls be-
may ex-
CC
CC
SO
if no
falls
+

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