STM804 STMICROELECTRONICS [STMicroelectronics], STM804 Datasheet - Page 10

• Manufacturer Part Number: STM804
• Description: 3V Supervisor with Battery Switchover
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM690/704/795/802/804/805/806
Chip-Enable Gating (STM795 only)
Internal gating of the chip enable (E) signal pre-
vents erroneous data from corrupting the external
CMOS RAM in the event of an undervoltage con-
dition. The STM795 uses a series transmission
gate from E to E
mal operation (reset not asserted), the E transmis-
sion gate is enabled and passes all E transitions.
When reset is asserted, this path becomes dis-
abled, preventing erroneous data from corrupting
the CMOS RAM. The short E propagation delay
from E to E
with most µPs. If E is low when reset asserts,
E
current WRITE cycle to complete.
Chip Enable Input (STM795 only)
The chip-enable transmission gate is disabled and
E is high impedance (disabled mode) while reset
is asserted. During a power-down sequence when
V
transmission gate disables and E immediately be-
comes high impedance if the voltage at E is high.
If E is low when reset asserts, the chip-enable
transmission gate will disable 10µs after reset as-
serts (see Figure 13). This permits the current
WRITE cycle to complete during power-down.
Figure 12. Chip-Enable Gating
Figure 13. Chip Enable Waveform (STM795)
10/31
CON
CC
passes the reset threshold, the chip-enable
AI08802
remains low for typically 10µs to permit the
V
E
RST
E
V
CC
CC
CON
E
CON
V
CON
enables the STM795 to be used
RST
V
RST
V
BAT
(see Figure 12). During nor-
trec
½ trec
10µs
COMPARE
E
CON
CONTROL
trec
OUTPUT
Any time a reset is generated, the chip-enable
transmission gate remains disabled and E remains
high impedance (regardless of E activity) for the
first half of the reset time-out period (t
the chip enable transmission gate is enabled, the
impedance of E appears as a 40
ries with the load at E
through the chip-enable transmission gate de-
pends on V
connected to E, and the loading on E
enable propagation delay is production tested
from the 50% point on E to the 50% point on E
using a 50
(see
tion delay, minimize the capacitive load at E
and use a low-output impedance driver.
Chip Enable Output (STM795 only)
When the chip-enable transmission gate is en-
abled, the impedance of E
40
the disabled mode, the transmission gate is off
and an active pull-up connects E
Figure 12). This pull-up turns off when the trans-
mission gate is enabled.
½ trec
resistor in series with the source driving E. In
Figure 35., page
CC
Generator
driver and a 50pF load capacitance
, the source impedance of the drive
t
rec
CON
22). For minimum propaga-
. The propagation delay
CON
CON
is equivalent to a
AI08855b
resistor in se-
RST
CON
V
E
to V
OUT
CON
rec
/2). When
. The chip
OUT
(see
CON
CON