ICE3DS01L_05 INFINEON [Infineon Technologies AG], ICE3DS01L_05 Datasheet - Page 10

• Manufacturer Part Number: ICE3DS01L_05
• Description: Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell
• Manufacturer: INFINEON [Infineon Technologies AG]

3.4
Figure 7
3.4.1
The oscillator generates a frequency f
resistor, a capacitor and a current source and current sink
which determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a very
accurate switching frequency. The ratio of controlled charge
to discharge current is adjusted to reach a maximum duty
cycle limitation of D
3.4.2
The oscillator clock output provides a set pulse to the PWM-
Latch when initiating the external Power Switch conduction.
After setting the PWM-Latch can be reset by the PWM
comparator, the Soft Start comparator, the Current-Limit
comparator or comparator C3. In case of resetting the driver
is shut down immediately.
3.4.3
The Gate Driver is a fast totem pole gate drive which is
designed to avoid cross conduction currents and which is
equipped with a zener diode Z1 (see Figure 8) in order to
improve the control of the Gate attached power transistors as
well as to protect them against undesirable gate
overvoltages.
The Gate Driver is active low at voltages below the
undervoltage lockout threshold V
Version 2.1
Comparator
Comparator
Comparator
Soft Start
Limiting
Current
PWM
C3
Duty Cycle
Oscillator
Clock
max
PWM Section
Oscillator
PWM-Latch FF1
Gate Driver
PWM Section
max
0.72
=0.72.
G8
1
R
S
VCCoff
FF1
Q
.
switch
Gate Driver
PW M Section
G9
&
= 110kHz. A
Gate
10
Figure 8
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing the
switch on slope when exceeding the external Power Switch
threshold. This is achieved by a slope control of the rising
edge at the driver’s output (see Figure 9).
Figure 9
Thus the leading switch on spike is minimized. When the
external Power Switch is switched off, the falling shape of
the driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit is
designed to eliminate cross conduction of the output stage.
PWM-Latch
5V
V
Gate
Gate Driver
Gate Rising Slope
ca. t = 130ns
1
VCC
Functional Description
Z1
C
ICE3DS01L/LG
Load
= 1nF
15 Nov 2005
Gate
t
F3