M58WR032FB60ZB6 STMICROELECTRONICS [STMicroelectronics], M58WR032FB60ZB6 Datasheet - Page 32

• Manufacturer Part Number: M58WR032FB60ZB6
• Description: 32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58WR032FT, M58WR032FB
other modes, WAIT is always asserted (except for
Read Array mode).
See
istics, and
AC
Synchronous Burst Read Suspend. A
chronous Burst Read operation can be suspend-
ed, freeing the data bus for other higher priority
devices. It can be suspended during the initial ac-
cess latency time (before data is output) in which
case the initial latency time can be reduced to ze-
ro, or after the device has output data. When the
Synchronous Burst Read operation is suspended,
internal array sensing continues and any previous-
ly latched internal data is retained. A burst se-
quence can be suspended and resumed as often
as required as long as the operating conditions of
the device are met.
A Synchronous Burst Read operation is suspend-
ed when E is low and the current address has
been latched (on a Latch Enable rising edge or on
a valid clock edge). The clock signal is then halted
at V
When G becomes low again and the clock signal
restarts, the Synchronous Burst Read operation is
resumed exactly where it stopped.
32/86
Waveforms, for details.
IH
Table 21., Synchronous Read AC Character-
or at V
Figure 12., Synchronous Burst Read
IL
, and G goes high.
Syn-
WAIT being gated by E remains active and will not
revert to high-impedance when G goes high. So if
two or more devices are connected to the system’s
READY signal, to prevent bus contention the
WAIT signal of the Flash memory should not be di-
rectly connected to the system’s READY signal.
See
istics
Suspend AC
Single Synchronous Read Mode
Single Synchronous Read operations are similar
to Synchronous Burst Read operations except that
only the first data output after the X latency is valid.
Synchronous Single Reads are used to read the
Electronic Signature, Status Register, CFI, Block
Protection Status, Configuration Register Status
or Protection Register. When the addressed bank
is in Read CFI, Read Status Register or Read
Electronic Signature mode, the WAIT signal is al-
ways asserted.
See
istics
AC
Waveforms, for details.
Table 21., Synchronous Read AC Character-
Table 21., Synchronous Read AC Character-
and
and
Figure 13., Single Synchronous Read
Figure 14., Synchronous Burst Read
Waveforms, for details.