HYB18T512800BF QIMONDA [Qimonda AG], HYB18T512800BF Datasheet - Page 28

• Manufacturer Part Number: HYB18T512800BF
• Description: 240-Pin Registered DDR2 SDRAM Modules
• Manufacturer: QIMONDA [Qimonda AG]

1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Rev. 1.1, 2007-03
03292006-EO3M-LEK7
Symbol
t
t
t
t
t
t
t
t
AOND
AON
AONPD
AOFD
AOF
AOFPD
ANPD
AXPD
the ODT resistance is fully on. Both are measured from
10 ns (= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
Both are measured from
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency
ODT Power Down Exit Latency
t
AOFD
. Both are measured from
ODT AC Characteristics and Operating Conditions for DDR2-533 & DDR2-400
t
t
AOND
AOFD
, which is interpreted differently per speed bin. For DDR2-400/533,
, which is interpreted differently per speed bin. For DDR2-400/533,
Values
Min.
2
t
t
2.5
t
t
3
8
AC.MIN
AC.MIN
AC.MIN
AC.MIN
28
+ 2 ns
+ 2 ns
t
CK
HYS72T[64/128/256]xxxHP–[25F/2.5/3/3S/3.7]–B
= 5 ns.
t
CK
= 5 ns.
Max.
2
t
2
t
2.5
—
2.5
—
AC.MAX
AC.MAX
t
CK +
t
CK +
t
+ 1 ns
AC.MAX
+ 0.6 ns
t
240-Pin Registered DDR2 SDRAM
AC.MAX
+ 1 ns
+ 1 ns
Internet Data Sheet
Unit
t
ns
ns
t
ns
ns
t
t
CK
CK
CK
CK
TABLE 19
Note
—
1)
—
—
2)
—
—
—
t
t
AOND
AOFD
is
is