HYB18T512160AF INFINEON [Infineon Technologies AG], HYB18T512160AF Datasheet - Page 34

• Manufacturer Part Number: HYB18T512160AF
• Description: 512-Mbit DDR2 SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

3.10
The Extended Mode Registers EMR(2) and EMR(3)
are reserved for future use and must be programmed
when setting the mode register during initialization.The
extended mode register EMR(2) is written by asserting
LOW on CS, RAS, CAS, WE, BA0 and HIGH on BA1,
while controlling the states of the address pins. The
DDR2 SDRAM should be in all bank precharge with
Table 11
Field
BA2
BA1
BA0
A
1) w = write only
Data Sheet
Bits
16
15
14
[13:0]
Extended Mode Register EMR(2)
EMRS(2) Programming Extended Mode register Definition (BA[2:0]=010
Type
reg.addr
w
1)
Description
Bank Address[2]
Note: BA2 is not available on 256Mbit and 512Mbit components
0
Bank Adress[1]
1
Bank Adress[0]
0
Address Bus[13:0]
Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration
0
B
B
B
B
BA2, Bank Address
BA1, Bank Address
BA0, Bank Address
A[13:0], Address bits
34
CKE already high prior to writing into the extended
mode register. The mode register set command cycle
time (
operation to the EMR(2). Mode register contents can
be changed using the same command and clock cycle
requirements during normal operation as long as all
banks are in precharge state.
t
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
MRD
) must be satisfied to complete the write
512-Mbit DDR2 SDRAM
Functional Description
09112003-SDM9-IQ3P
B
)
Rev. 1.3, 2005-01